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llvm-6502/test/CodeGen/X86/bt.ll

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Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:54:48 +00:00
; RUN: llc < %s -march=x86 | grep btl | count 28
; RUN: llc < %s -march=x86 -mcpu=pentium4 | grep btl | not grep esp
; RUN: llc < %s -march=x86 -mcpu=penryn | grep btl | not grep esp
add PR # git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61427 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 05:40:38 +00:00
; PR3253
Disable the register+memory forms of the bt instructions for now. Thanks to Eli for pointing out that these forms don't ignore the high bits of their index operands, and as such are not immediately suitable for use by isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:23:30 +00:00
; The register+memory form of the BT instruction should be usable on
; pentium4, however it is currently disabled due to the register+memory
; form having different semantics than the register+register form.
Make x86's BT instruction matching more thorough, and add some dagcombines that help it match in several more cases. Add several more cases to test/CodeGen/X86/bt.ll. This doesn't yet include matching for BT with an immediate operand, it just covers more register+register cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 01:59:02 +00:00
; Test these patterns:
; (X & (1 << N)) != 0 --> BT(X, N).
; ((X >>u N) & 1) != 0 --> BT(X, N).
; as well as several variations:
; - The second form can use an arithmetic shift.
; - Either form can use == instead of !=.
; - Either form can compare with an operand of the &
; instead of with 0.
; - The comparison can be commuted (only cases where neither
; operand is constant are included).
; - The and can be commuted.
Add a simple pattern for matching 'bt'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 05:34:37 +00:00
define void @test2(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
Make x86's BT instruction matching more thorough, and add some dagcombines that help it match in several more cases. Add several more cases to test/CodeGen/X86/bt.ll. This doesn't yet include matching for BT with an immediate operand, it just covers more register+register cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 01:59:02 +00:00
define void @test2b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @atest2(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @atest2b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @test3(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @test3b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @testne2(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @testne2b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @atestne2(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @atestne2b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @testne3(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @testne3b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @query2(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @query2b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @aquery2(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @aquery2b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @query3(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp3, %tmp29 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @query3b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp eq i32 %tmp3, %tmp29 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @query3x(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp eq i32 %tmp29, %tmp3 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @query3bx(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp eq i32 %tmp29, %tmp3 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @queryne2(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @queryne2b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @aqueryne2(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @aqueryne2b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @queryne3(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp3, %tmp29 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @queryne3b(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp ne i32 %tmp3, %tmp29 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @queryne3x(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
%tmp4 = icmp ne i32 %tmp29, %tmp3 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
define void @queryne3bx(i32 %x, i32 %n) nounwind {
entry:
%tmp29 = shl i32 1, %n ; <i32> [#uses=1]
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp ne i32 %tmp29, %tmp3 ; <i1> [#uses=1]
br i1 %tmp4, label %bb, label %UnifiedReturnBlock
bb: ; preds = %entry
call void @foo()
ret void
UnifiedReturnBlock: ; preds = %entry
ret void
}
Add a simple pattern for matching 'bt'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 05:34:37 +00:00
declare void @foo()
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