2012-02-17 08:55:11 +00:00
|
|
|
//===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
|
2007-06-06 07:42:06 +00:00
|
|
|
//
|
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
2007-12-29 20:36:04 +00:00
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
2007-06-06 07:42:06 +00:00
|
|
|
//
|
2011-04-15 21:51:11 +00:00
|
|
|
//===----------------------------------------------------------------------===//
|
2007-06-06 07:42:06 +00:00
|
|
|
//
|
2011-07-01 21:01:15 +00:00
|
|
|
// This file implements the Mips specific subclass of TargetSubtargetInfo.
|
2007-06-06 07:42:06 +00:00
|
|
|
//
|
2011-04-15 21:51:11 +00:00
|
|
|
//===----------------------------------------------------------------------===//
|
2007-06-06 07:42:06 +00:00
|
|
|
|
|
|
|
#include "MipsSubtarget.h"
|
|
|
|
#include "Mips.h"
|
2012-03-28 00:24:17 +00:00
|
|
|
#include "MipsRegisterInfo.h"
|
2011-08-24 18:08:43 +00:00
|
|
|
#include "llvm/Support/TargetRegistry.h"
|
2011-07-01 20:45:01 +00:00
|
|
|
|
|
|
|
#define GET_SUBTARGETINFO_TARGET_DESC
|
2011-07-08 01:53:10 +00:00
|
|
|
#define GET_SUBTARGETINFO_CTOR
|
2011-07-01 22:36:09 +00:00
|
|
|
#include "MipsGenSubtargetInfo.inc"
|
2011-07-01 20:45:01 +00:00
|
|
|
|
2007-06-06 07:42:06 +00:00
|
|
|
using namespace llvm;
|
|
|
|
|
2011-12-20 02:50:00 +00:00
|
|
|
void MipsSubtarget::anchor() { }
|
|
|
|
|
2011-06-30 01:53:36 +00:00
|
|
|
MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
|
2012-08-22 03:18:13 +00:00
|
|
|
const std::string &FS, bool little,
|
|
|
|
Reloc::Model RM) :
|
2011-07-07 07:07:08 +00:00
|
|
|
MipsGenSubtargetInfo(TT, CPU, FS),
|
2012-02-28 07:46:26 +00:00
|
|
|
MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
|
2011-09-21 17:31:45 +00:00
|
|
|
IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
|
|
|
|
IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false),
|
2012-11-15 21:17:13 +00:00
|
|
|
HasMinMax(false), HasSwap(false), HasBitCount(false), HasFPIdx(false),
|
|
|
|
InMips16Mode(false), HasDSP(false), HasDSPR2(false), IsAndroid(false)
|
2007-06-06 07:42:06 +00:00
|
|
|
{
|
2011-06-30 01:53:36 +00:00
|
|
|
std::string CPUName = CPU;
|
|
|
|
if (CPUName.empty())
|
2011-11-29 23:08:41 +00:00
|
|
|
CPUName = "mips32";
|
2007-06-06 07:42:06 +00:00
|
|
|
|
|
|
|
// Parse features string.
|
2011-07-07 07:07:08 +00:00
|
|
|
ParseSubtargetFeatures(CPUName, FS);
|
2008-07-14 14:42:54 +00:00
|
|
|
|
2011-07-01 20:45:01 +00:00
|
|
|
// Initialize scheduling itinerary for the specified CPU.
|
|
|
|
InstrItins = getInstrItineraryForCPU(CPUName);
|
|
|
|
|
2011-09-21 02:45:29 +00:00
|
|
|
// Set MipsABI if it hasn't been set yet.
|
|
|
|
if (MipsABI == UnknownABI)
|
2012-02-28 07:46:26 +00:00
|
|
|
MipsABI = hasMips64() ? N64 : O32;
|
2011-09-21 02:45:29 +00:00
|
|
|
|
|
|
|
// Check if Architecture and ABI are compatible.
|
|
|
|
assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) ||
|
|
|
|
(hasMips64() && (isABI_N32() || isABI_N64()))) &&
|
|
|
|
"Invalid Arch & ABI pair.");
|
|
|
|
|
2008-07-14 14:42:54 +00:00
|
|
|
// Is the target system Linux ?
|
|
|
|
if (TT.find("linux") == std::string::npos)
|
|
|
|
IsLinux = false;
|
2012-08-22 03:18:13 +00:00
|
|
|
|
|
|
|
// Set UseSmallSection.
|
|
|
|
UseSmallSection = !IsLinux && (RM == Reloc::Static);
|
2007-06-06 07:42:06 +00:00
|
|
|
}
|
2012-03-28 00:24:17 +00:00
|
|
|
|
|
|
|
bool
|
|
|
|
MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
|
2012-06-14 21:10:56 +00:00
|
|
|
TargetSubtargetInfo::AntiDepBreakMode &Mode,
|
|
|
|
RegClassVector &CriticalPathRCs) const {
|
2012-05-15 03:14:52 +00:00
|
|
|
Mode = TargetSubtargetInfo::ANTIDEP_NONE;
|
2012-03-28 00:24:17 +00:00
|
|
|
CriticalPathRCs.clear();
|
|
|
|
CriticalPathRCs.push_back(hasMips64() ?
|
|
|
|
&Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass);
|
2012-03-28 00:52:23 +00:00
|
|
|
return OptLevel >= CodeGenOpt::Aggressive;
|
2012-03-28 00:24:17 +00:00
|
|
|
}
|