mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-12 13:30:51 +00:00
[X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly
Differential Revision: http://reviews.llvm.org/D11257 Patch by: marina.yatsina@intel.com git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242639 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
c365e7e2b5
commit
00552e3875
@ -1028,6 +1028,7 @@ static unsigned getIntelMemOperandSize(StringRef OpStr) {
|
||||
.Cases("DWORD", "dword", 32)
|
||||
.Cases("QWORD", "qword", 64)
|
||||
.Cases("XWORD", "xword", 80)
|
||||
.Cases("TBYTE", "tbyte", 80)
|
||||
.Cases("XMMWORD", "xmmword", 128)
|
||||
.Cases("YMMWORD", "ymmword", 256)
|
||||
.Cases("ZMMWORD", "zmmword", 512)
|
||||
|
@ -635,10 +635,12 @@ add byte ptr [rax], 1
|
||||
// CHECK: addw $1, (%rax)
|
||||
// CHECK: addb $1, (%rax)
|
||||
|
||||
fstp tbyte ptr [rax]
|
||||
fstp xword ptr [rax]
|
||||
fstp qword ptr [rax]
|
||||
fstp dword ptr [rax]
|
||||
// CHECK: fstpt (%rax)
|
||||
// CHECK: fstpt (%rax)
|
||||
// CHECK: fstpl (%rax)
|
||||
// CHECK: fstps (%rax)
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user