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Fix TableGen -gen-disassembler output for bit fields with an offset.

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This fixes bit assignments like this
Inst{7-0} = Foo{9-2}

Patch by Steve King.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218560 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2014-09-27 04:38:02 +00:00
parent 676af35b38
commit 00bc445d75
2 changed files with 79 additions and 1 deletions
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74
test/TableGen/BitOffsetDecoder.td Normal file
View File

@ -0,0 +1,74 @@
// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
include "llvm/Target/Target.td"
def archInstrInfo : InstrInfo { }
def arch : Target {
let InstructionSet = archInstrInfo;
}
def Myi32 : Operand<i32> {
let DecoderMethod = "DecodeMyi32";
}
let OutOperandList = (outs), Size = 2 in {
def foo : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7-0} = 0xAA;
let Inst{14-8} = factor{6-0}; // no offset
let AsmString = "foo $factor";
field bits<16> SoftFail = 0;
}
def bar : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7-0} = 0xBB;
let Inst{15-8} = factor{10-3}; // offset by 3
let AsmString = "bar $factor";
field bits<16> SoftFail = 0;
}
def biz : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7-0} = 0xCC;
let Inst{11-8,15-12} = factor{10-3}; // offset by 3, multipart
let AsmString = "biz $factor";
field bits<16> SoftFail = 0;
}
def baz : Instruction {
let InOperandList = (ins Myi32:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7-0} = 0xDD;
let Inst{15-8} = factor{11-4}; // offset by 4 + custom decode
let AsmString = "baz $factor";
field bits<16> SoftFail = 0;
}
def bum : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7-0} = 0xEE;
let Inst{15-8} = !srl(factor,5);
let AsmString = "bum $factor";
field bits<16> SoftFail = 0;
}
}
// CHECK: tmp = fieldFromInstruction(insn, 8, 7);
// CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 3;
// CHECK: tmp |= (fieldFromInstruction(insn, 8, 4) << 7);
// CHECK: tmp |= (fieldFromInstruction(insn, 12, 4) << 3);
// CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 4;

6
utils/TableGen/FixedLenDecoderEmitter.cpp
View File

@ -1051,7 +1051,11 @@ void FilterChooser::emitBinaryParser(raw_ostream &o, unsigned &Indentation,
OperandInfo::const_iterator OI = OpInfo.begin();
o.indent(Indentation) << "tmp = fieldFromInstruction"
<< "(insn, " << OI->Base << ", " << OI->Width
<< ");\n";
<< ")";
if (OI->Offset)
o << " << " << OI->Offset;
o << ";\n";
} else {
o.indent(Indentation) << "tmp = 0;\n";
for (OperandInfo::const_iterator OI = OpInfo.begin(), OE = OpInfo.end();