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Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15636 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman
2004-08-11 00:11:25 +00:00
parent c0f6420b96
commit 0145881cb9
8 changed files with 29 additions and 4351 deletions
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101
lib/Target/PowerPC/PPCTargetMachine.cpp
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@ -23,10 +23,12 @@
#include <iostream>
using namespace llvm;
namespace {
// Register the target.
RegisterTarget<PowerPCTargetMachine> X("powerpc", " PowerPC (experimental)");
}
PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
IntrinsicLowering *IL,
const TargetData &TD,
const TargetFrameInfo &TFI,
const PowerPCJITInfo &TJI)
: TargetMachine(name, IL, TD), FrameInfo(TFI), JITInfo(TJI) {}
unsigned PowerPCTargetMachine::getJITMatchQuality() {
#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
@ -35,86 +37,17 @@ unsigned PowerPCTargetMachine::getJITMatchQuality() {
return 0;
#endif
}
unsigned PowerPCTargetMachine::getModuleMatchQuality(const Module &M) {
if (M.getEndianness() == Module::BigEndian &&
M.getPointerSize() == Module::Pointer32)
return 10; // Direct match
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
return getJITMatchQuality()/2;
}
/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
///
PowerPCTargetMachine::PowerPCTargetMachine(const Module &M,
IntrinsicLowering *IL)
: TargetMachine("PowerPC", IL, false, 4, 4, 4, 4, 4, 4, 2, 1, 4),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, -4), JITInfo(*this) {
}
/// addPassesToEmitAssembly - Add passes to the specified pass manager
/// to implement a static compiler for this target.
///
bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
std::ostream &Out) {
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
// FIXME: Implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
PM.add(createLowerConstantExpressionsPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createPPCSimpleInstructionSelector(*this));
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createRegisterAllocator());
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// I want a PowerPC specific prolog/epilog code inserter so I can put the
// fills/spills in the right spots.
PM.add(createPowerPCPEI());
// Must run branch selection immediately preceding the printer
PM.add(createPPCBranchSelectionPass());
PM.add(createPPCAsmPrinterPass(Out, *this));
PM.add(createMachineCodeDeleter());
return false;
}
/// addPassesToJITCompile - Add passes to the specified pass manager to
/// implement a fast dynamic compiler for this target.
///
void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
// FIXME: Implement the invoke/unwind instructions!
PM.add(createLowerInvokePass());
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
PM.add(createLowerConstantExpressionsPass());
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
PM.add(createPPCSimpleInstructionSelector(TM));
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
assert(0 && "Cannot execute PowerPCJITInfo::addPassesToJITCompile()");
}
void PowerPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
assert(0 && "Cannot execute PowerPCJITInfo::replaceMachineCodeForFunction()");
}
void *PowerPCJITInfo::getJITStubForFunction(Function *F,
MachineCodeEmitter &MCE) {
assert(0 && "Cannot execute PowerPCJITInfo::getJITStubForFunction()");
return 0;
}