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Handle early-clobber registers in the aggressive anti-dep breaker

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The aggressive anti-dep breaker, used by the PowerPC backend during post-RA
scheduling (but is available to all targets), did not handle early-clobber MI
operands (at all). When constructing the list of available registers for the
replacement of some def operand, check the using instructions, and remove
registers assigned to early-clobbered defs from the set.

Fixes PR21452.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223727 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2014-12-09 01:00:59 +00:00
parent 772e538fb8
commit 014b06e7b2
2 changed files with 62 additions and 0 deletions
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15
lib/CodeGen/AggressiveAntiDepBreaker.cpp
View File

@ -673,6 +673,21 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
goto next_super_reg;
}
// We cannot rename 'Reg' to 'NewReg' if one of the uses of 'Reg' also
// defines 'NewReg' via an early-clobber operand.
auto Range = RegRefs.equal_range(Reg);
for (auto Q = Range.first, QE = Range.second; Q != QE; ++Q) {
auto UseMI = Q->second.Operand->getParent();
int Idx = UseMI->findRegisterDefOperandIdx(NewReg, false, true, TRI);
if (Idx == -1)
continue;
if (UseMI->getOperand(Idx).isEarlyClobber()) {
DEBUG(dbgs() << "(ec)");
goto next_super_reg;
}
}
// Record that 'Reg' can be renamed to 'NewReg'.
RenameMap.insert(std::pair<unsigned, unsigned>(Reg, NewReg));
}

47
test/CodeGen/PowerPC/post-ra-ec.ll Normal file
View File

@ -0,0 +1,47 @@
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
%struct.inode.0.12.120 = type { i8* }
%struct.kstat2.1.13.121 = type { i32 }
%struct.task_struct.4.16.124 = type { i8*, %struct.atomic_t.2.14.122, %struct.signal_struct.3.15.123* }
%struct.atomic_t.2.14.122 = type { i32 }
%struct.signal_struct.3.15.123 = type { i64 }
%struct.pid.5.17.125 = type { i8* }
; Function Attrs: nounwind
define signext i32 @proc_task_getattr(%struct.inode.0.12.120* nocapture readonly %inode, %struct.kstat2.1.13.121* nocapture %stat) #0 {
entry:
%call1.i = tail call %struct.task_struct.4.16.124* @get_pid_task(%struct.pid.5.17.125* undef, i32 zeroext 0) #0
br i1 undef, label %if.end, label %if.then
if.then: ; preds = %entry
%0 = load i64* undef, align 8
%conv.i = trunc i64 %0 to i32
%1 = load i32* null, align 4
%add = add i32 %1, %conv.i
store i32 %add, i32* null, align 4
%counter.i.i = getelementptr inbounds %struct.task_struct.4.16.124* %call1.i, i64 0, i32 1, i32 0
%2 = tail call i32 asm sideeffect "\09lwsync\0A1:\09lwarx\09$0,0,$1\09\09# atomic_dec_return\0A\09addic\09$0,$0,-1\0A\09stwcx.\09$0,0,$1\0A\09bne-\091b\0A\09sync\0A", "=&r,r,~{cr0},~{xer},~{memory}"(i32* %counter.i.i) #0
%cmp.i = icmp eq i32 %2, 0
br i1 %cmp.i, label %if.then.i, label %if.end
; CHECK-LABEL: @proc_task_getattr
; CHECK-NOT: stwcx. [[REG:[0-9]+]],0,[[REG]]
; CHECK: blr
if.then.i: ; preds = %if.then
%3 = bitcast %struct.task_struct.4.16.124* %call1.i to i8*
tail call void @foo(i8* %3) #0
unreachable
if.end: ; preds = %if.then, %entry
ret i32 0
}
declare void @foo(i8*)
declare %struct.task_struct.4.16.124* @get_pid_task(%struct.pid.5.17.125*, i32 zeroext)
attributes #0 = { nounwind }