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ARM Assembler support for DMB instruction.

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Flesh out the options supported for the instruction. Shuffle tests a bit and
add entries for the rest of the options. Add an alias to handle the default
operand of "sy".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135109 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-07-13 23:40:38 +00:00
parent 20fcaffaf7
commit 032434d622
4 changed files with 38 additions and 24 deletions
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2
lib/Target/ARM/ARMInstrInfo.td
View File

@ -3304,6 +3304,8 @@ def DMB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
}
}
def : InstAlias<"dmb", (DMB 0xf)>;
def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
"dsb", "\t$opt", []>,
Requires<[IsARM, HasDB]> {

4
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -1343,10 +1343,14 @@ tryParseMemBarrierOptOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
unsigned Opt = StringSwitch<unsigned>(OptStr.slice(0, OptStr.size()))
.Case("sy", ARM_MB::SY)
.Case("st", ARM_MB::ST)
.Case("sh", ARM_MB::ISH)
.Case("ish", ARM_MB::ISH)
.Case("shst", ARM_MB::ISHST)
.Case("ishst", ARM_MB::ISHST)
.Case("nsh", ARM_MB::NSH)
.Case("un", ARM_MB::NSH)
.Case("nshst", ARM_MB::NSHST)
.Case("unst", ARM_MB::NSHST)
.Case("osh", ARM_MB::OSH)
.Case("oshst", ARM_MB::OSHST)
.Default(~0U);

24
test/MC/ARM/arm_instructions.s
View File

@ -191,30 +191,6 @@
@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3]
nop
@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
dmb sy
@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5]
dmb st
@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
dmb ish
@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
dmb ishst
@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
dmb nsh
@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
dmb nshst
@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5]
dmb osh
@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5]
dmb oshst
@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
dsb sy

32
test/MC/ARM/basic-arm-instructions.s
View File

@ -458,3 +458,35 @@ _func:
@ CHECK: dbg #0 @ encoding: [0xf0,0xf0,0x20,0xe3]
@ CHECK: dbg #5 @ encoding: [0xf5,0xf0,0x20,0xe3]
@ CHECK: dbg #15 @ encoding: [0xff,0xf0,0x20,0xe3]
@------------------------------------------------------------------------------
@ DMB
@------------------------------------------------------------------------------
dmb sy
dmb st
dmb sh
dmb ish
dmb shst
dmb ishst
dmb un
dmb nsh
dmb unst
dmb nshst
dmb osh
dmb oshst
dmb
@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5]
@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5]
@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5]
@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]