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Add new TargetInstrDesc::hasImplicitUseOfPhysReg and
hasImplicitDefOfPhysReg methods. Use them to remove a look in X86 fast isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68886 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -199,6 +199,24 @@ public:
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const unsigned *getImplicitDefs() const {
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return ImplicitDefs;
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}
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/// hasImplicitUseOfPhysReg - Return true if this instruction implicitly
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/// uses the specified physical register.
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bool hasImplicitUseOfPhysReg(unsigned Reg) const {
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if (const unsigned *ImpUses = ImplicitUses)
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for (; *ImpUses; ++ImpUses)
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if (*ImpUses == Reg) return true;
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return false;
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}
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/// hasImplicitDefOfPhysReg - Return true if this instruction implicitly
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/// defines the specified physical register.
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bool hasImplicitDefOfPhysReg(unsigned Reg) const {
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if (const unsigned *ImpDefs = ImplicitDefs)
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for (; *ImpDefs; ++ImpDefs)
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if (*ImpDefs == Reg) return true;
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return false;
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}
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/// getRegClassBarriers - Return a list of register classes that are
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/// completely clobbered by this machine instruction. For example, on X86
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@ -808,21 +808,9 @@ bool X86FastISel::X86SelectBranch(Instruction *I) {
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}
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const TargetInstrDesc &TID = MI.getDesc();
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const unsigned *ImpDefs = TID.getImplicitDefs();
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if (TID.hasUnmodeledSideEffects()) break;
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bool ModifiesEFlags = false;
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if (ImpDefs) {
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for (unsigned u = 0; ImpDefs[u]; ++u)
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if (ImpDefs[u] == X86::EFLAGS) {
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ModifiesEFlags = true;
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break;
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}
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}
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if (ModifiesEFlags) break;
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if (TID.hasUnmodeledSideEffects() ||
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TID.hasImplicitDefOfPhysReg(X86::EFLAGS))
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break;
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}
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if (SetMI) {
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