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Recognize target instruction flag 'isReMaterializable'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -91,6 +91,7 @@ namespace llvm {
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bool isConvertibleToThreeAddress;
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bool isCommutable;
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bool isTerminator;
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bool isReMaterializable;
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bool hasDelaySlot;
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bool usesCustomDAGSchedInserter;
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bool hasVariableNumberOfOperands;
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@ -356,6 +356,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
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isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
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isCommutable = R->getValueAsBit("isCommutable");
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isTerminator = R->getValueAsBit("isTerminator");
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isReMaterializable = R->getValueAsBit("isReMaterializable");
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hasDelaySlot = R->getValueAsBit("hasDelaySlot");
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usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
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hasCtrlDep = R->getValueAsBit("hasCtrlDep");
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@ -240,6 +240,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
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if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
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if (Inst.isCommutable) OS << "|M_COMMUTABLE";
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if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
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if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE";
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if (Inst.usesCustomDAGSchedInserter)
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OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
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if (Inst.hasVariableNumberOfOperands)
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