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Allow multiclass def names to contain "#NAME"" where TableGen replaces

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#NAME# with the name of the defm instantiating the multiclass.  This is
useful for AVX instruction naming where a "V" prefix is standard
throughout the ISA.  For example:

multiclass SSE_AVX_Inst<...> {
   def SS : Instr<...>;
   def SD : Instr<...>;
   def PS : Instr<...>;
   def PD : Instr<...>;

   def V#NAME#SS : Instr<...>;
   def V#NAME#SD : Instr<...>;
   def V#NAME#PS : Instr<...>;
   def V#NAME#PD : Instr<...>;
}

defm ADD : SSE_AVX_Inst<...>;

Results in 

ADDSS
ADDSD
ADDPS
ADDPD

VADDSS
VADDSD
VADDPS
VADDPD


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70979 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Greene
2009-05-05 16:28:25 +00:00
parent f868156820
commit 065f259ff5
3 changed files with 39 additions and 6 deletions
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utils/TableGen/TGParser.cpp
+12 -3
View File
@@ -1609,9 +1609,18 @@ bool TGParser::ParseDefm() {
for (unsigned i = 0, e = MC->DefPrototypes.size(); i != e; ++i) {
Record *DefProto = MC->DefPrototypes[i];
// Add the suffix to the defm name to get the new name.
Record *CurRec = new Record(DefmPrefix + DefProto->getName(),
DefmPrefixLoc);
// Add in the defm name
std::string DefName = DefProto->getName();
std::string::size_type idx = DefName.find("#NAME#");
if (idx != std::string::npos) {
DefName.replace(idx, 6, DefmPrefix);
}
else {
// Add the suffix to the defm name to get the new name.
DefName = DefmPrefix + DefName;
}
Record *CurRec = new Record(DefName, DefmPrefixLoc);
SubClassReference Ref;
Ref.RefLoc = DefmPrefixLoc;