David Greene 065f259ff5 Allow multiclass def names to contain "#NAME"" where TableGen replaces
#NAME# with the name of the defm instantiating the multiclass.  This is
useful for AVX instruction naming where a "V" prefix is standard
throughout the ISA.  For example:

multiclass SSE_AVX_Inst<...> {
   def SS : Instr<...>;
   def SD : Instr<...>;
   def PS : Instr<...>;
   def PD : Instr<...>;

   def V#NAME#SS : Instr<...>;
   def V#NAME#SD : Instr<...>;
   def V#NAME#PS : Instr<...>;
   def V#NAME#PD : Instr<...>;
}

defm ADD : SSE_AVX_Inst<...>;

Results in 

ADDSS
ADDSD
ADDPS
ADDPD

VADDSS
VADDSD
VADDPS
VADDPD


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 16:28:25 +00:00
2009-05-03 12:57:15 +00:00
2009-04-30 00:43:39 +00:00
2009-05-04 18:40:41 +00:00
2009-04-15 00:16:05 +00:00
2009-03-02 03:46:48 +00:00
2007-08-03 05:43:35 +00:00
2009-02-02 19:22:02 +00:00
2009-05-03 13:42:23 +00:00
2009-04-28 06:15:00 +00:00
2009-02-26 15:17:13 +00:00
2009-05-04 18:40:41 +00:00

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level 
Virtual Machine, a toolkit for the construction of highly optimized compilers,
optimizers, and runtime environments. 

LLVM is open source software. You may freely distribute it under the terms of
the license agreement found in LICENSE.txt.

Please see the HTML documentation provided in docs/index.html for further
assistance with LLVM.

Description
LLVM backend for 6502
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