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Bug in ExpandFCOPYSIGNToBitwiseOps(). Clear the old sign bit of operand 0
before or'ing in the sign bit of operand 1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32930 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -533,15 +533,17 @@ static SDOperand ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP,
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static
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SDOperand ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT::ValueType NVT,
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SelectionDAG &DAG, TargetLowering &TLI) {
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MVT::ValueType VT = Node->getValueType(0);
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MVT::ValueType SrcVT = Node->getOperand(1).getValueType();
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MVT::ValueType SrcNVT = (SrcVT == MVT::f64) ? MVT::i64 : MVT::i32;
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// First get the sign bit of second operand.
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SDOperand Mask = (SrcVT == MVT::f64)
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SDOperand Mask1 = (SrcVT == MVT::f64)
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? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
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: DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
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Mask = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask);
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Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
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SDOperand SignBit= DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Node->getOperand(1));
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SignBit = DAG.getNode(ISD::AND, SrcNVT, SignBit, Mask);
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SignBit = DAG.getNode(ISD::AND, SrcNVT, SignBit, Mask1);
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// Shift right or sign-extend it if the two operands have different types.
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int SizeDiff = MVT::getSizeInBits(SrcNVT) - MVT::getSizeInBits(NVT);
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if (SizeDiff > 0) {
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@ -550,8 +552,16 @@ SDOperand ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT::ValueType NVT,
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SignBit = DAG.getNode(ISD::TRUNCATE, NVT, SignBit);
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} else if (SizeDiff < 0)
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SignBit = DAG.getNode(ISD::SIGN_EXTEND, NVT, SignBit);
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// Or the first operand with the sign bit.
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// Clear the sign bit of first operand.
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SDOperand Mask2 = (VT == MVT::f64)
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? DAG.getConstantFP(BitsToDouble(~(1ULL << 63)), VT)
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: DAG.getConstantFP(BitsToFloat(~(1U << 31)), VT);
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Mask2 = DAG.getNode(ISD::BIT_CONVERT, NVT, Mask2);
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SDOperand Result = DAG.getNode(ISD::BIT_CONVERT, NVT, Node->getOperand(0));
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Result = DAG.getNode(ISD::AND, NVT, Result, Mask2);
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// Or the value with the sign bit.
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Result = DAG.getNode(ISD::OR, NVT, Result, SignBit);
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return Result;
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}
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