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Fix optimization of select_cc seteq X, 0, 1, 0 -> srl (ctlz X), log2 X size

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22995 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nate Begeman 2005-08-24 00:21:28 +00:00
parent 657b4d1ac6
commit 0750a40a4f
1 changed files with 3 additions and 3 deletions
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6
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -854,9 +854,9 @@ SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2,
}
// Check to see if this is the equivalent of seteq X, 0.
// select_cc seteq X, 0, 1, 0 -> setcc X, 0, seteq -> srl (ctlz X), size(X)-1
// select_cc eq X, 0, 1, 0 -> setcc X, 0, eq -> srl (ctlz X), log2(size(X))
if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() &&
N3C && (N3C->getValue() == 1)) {
N3C && (N3C->getValue() == 1ULL) && CC == ISD::SETEQ) {
MVT::ValueType XType = N1.getValueType();
if (TLI.getOperationAction(ISD::SETCC, TLI.getSetCCResultTy()) ==
TargetLowering::Legal) {
@ -865,7 +865,7 @@ SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2,
if (TLI.getOperationAction(ISD::CTLZ, XType) == TargetLowering::Legal) {
SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1);
return getNode(ISD::SRL, XType, Ctlz,
getConstant(MVT::getSizeInBits(XType)-1,
getConstant(Log2_32(MVT::getSizeInBits(XType)),
TLI.getShiftAmountTy()));
}
}