Use the right instructions to copy between GPR and the more strictive tGPR classes. t2MOV does not match the RC requirements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77175 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-07-27 00:33:08 +00:00
parent dced03fc84
commit 08b93c6a70
2 changed files with 12 additions and 5 deletions

View File

@ -612,7 +612,7 @@ ARMBaseInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
}
if (DestRC == ARM::GPRRegisterClass)
AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(getOpcode(ARMII::MOVr)),
AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::MOVr),
DestReg).addReg(SrcReg)));
else if (DestRC == ARM::SPRRegisterClass)
AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FCPYS), DestReg)

View File

@ -84,14 +84,21 @@ Thumb2InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
DebugLoc DL = DebugLoc::getUnknownLoc();
if (I != MBB.end()) DL = I->getDebugLoc();
if ((DestRC == ARM::GPRRegisterClass &&
SrcRC == ARM::tGPRRegisterClass) ||
(DestRC == ARM::tGPRRegisterClass &&
SrcRC == ARM::GPRRegisterClass)) {
if (DestRC == ARM::GPRRegisterClass &&
SrcRC == ARM::GPRRegisterClass) {
AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2MOVr),
DestReg).addReg(SrcReg)));
return true;
} else if (DestRC == ARM::GPRRegisterClass &&
SrcRC == ARM::tGPRRegisterClass) {
BuildMI(MBB, I, DL, get(ARM::tMOVtgpr2gpr), DestReg).addReg(SrcReg);
return true;
} else if (DestRC == ARM::tGPRRegisterClass &&
SrcRC == ARM::GPRRegisterClass) {
BuildMI(MBB, I, DL, get(ARM::tMOVgpr2tgpr), DestReg).addReg(SrcReg);
return true;
}
// Handle SPR, DPR, and QPR copies.
return ARMBaseInstrInfo::copyRegToReg(MBB, I, DestReg, SrcReg, DestRC, SrcRC);
}