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Add a test case for r176066.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176119 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2013-02-26 20:22:30 +00:00
parent ac67b50fcf
commit 0908bcbf44
1 changed files with 10 additions and 0 deletions
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10
test/CodeGen/X86/fast-isel-args-fail.ll Normal file
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; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-apple-darwin10
; Requires: Asserts
; Previously, this would cause an assert.
define i31 @t1(i31 %a, i31 %b, i31 %c) {
entry:
%add = add nsw i31 %b, %a
%add1 = add nsw i31 %add, %c
ret i31 %add1
}