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Disable the PPC CTR-Loops pass by default.
The pass itself works well, but the something in the Machine* infrastructure does not understand terminators which define registers. Without the ability to use the block-placement pass, etc. this causes performance regressions (and so is turned off by default). Turning off the analysis turns off the problems with the Machine* infrastructure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158206 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -40,6 +40,10 @@ extern cl::opt<bool> DisablePPC64RS;
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using namespace llvm;
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static cl::
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opt<bool> EnableCTRLoopAnal("enable-ppc-ctrloop-analysis", cl::Hidden,
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cl::desc("Enable analysis for CTR loops (experimental)"));
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PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
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: PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP),
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TM(tm), RI(*TM.getSubtargetImpl(), *this) {}
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@ -229,6 +233,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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LastInst->getOpcode() == PPC::BDNZ) {
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if (!LastInst->getOperand(0).isMBB())
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return true;
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if (!EnableCTRLoopAnal)
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return true;
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TBB = LastInst->getOperand(0).getMBB();
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Cond.push_back(MachineOperand::CreateImm(1));
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Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
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@ -238,6 +244,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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LastInst->getOpcode() == PPC::BDZ) {
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if (!LastInst->getOperand(0).isMBB())
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return true;
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if (!EnableCTRLoopAnal)
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return true;
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TBB = LastInst->getOperand(0).getMBB();
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Cond.push_back(MachineOperand::CreateImm(0));
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Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
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@ -274,6 +282,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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if (!SecondLastInst->getOperand(0).isMBB() ||
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!LastInst->getOperand(0).isMBB())
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return true;
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if (!EnableCTRLoopAnal)
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return true;
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TBB = SecondLastInst->getOperand(0).getMBB();
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Cond.push_back(MachineOperand::CreateImm(1));
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Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
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@ -286,6 +296,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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if (!SecondLastInst->getOperand(0).isMBB() ||
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!LastInst->getOperand(0).isMBB())
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return true;
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if (!EnableCTRLoopAnal)
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return true;
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TBB = SecondLastInst->getOperand(0).getMBB();
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Cond.push_back(MachineOperand::CreateImm(0));
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Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
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@ -23,8 +23,8 @@
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using namespace llvm;
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static cl::
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opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
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cl::desc("Disable CTR loops for PPC"));
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opt<bool> EnableCTRLoops("enable-ppc-ctrloops", cl::Hidden,
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cl::desc("Enable CTR loops for PPC"));
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extern "C" void LLVMInitializePowerPCTarget() {
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// Register the targets
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@ -103,9 +103,10 @@ TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
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}
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bool PPCPassConfig::addPreRegAlloc() {
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if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) {
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// FIXME: Once this can be enabled by default, this condition should read:
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// if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
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if (EnableCTRLoops)
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PM->add(createPPCCTRLoops());
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}
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return false;
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}
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@ -1,7 +1,7 @@
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; ModuleID = 'bugpoint-reduced-simplified.bc'
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; RUN: llc < %s -march=ppc64 | FileCheck %s
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; RUN: llc -enable-ppc-ctrloops < %s -march=ppc64 | FileCheck %s
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%struct.ref_s.1.49.91.115.121.139.145.151.157.163.169.175.181.211 = type { %union.v.0.48.90.114.120.138.144.150.156.162.168.174.180.210, i16, i16 }
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%union.v.0.48.90.114.120.138.144.150.156.162.168.174.180.210 = type { i64 }
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@ -1,6 +1,6 @@
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-freebsd10.0"
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; RUN: llc < %s -march=ppc64 | FileCheck %s
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; RUN: llc -enable-ppc-ctrloops -enable-ppc-ctrloop-analysis < %s -march=ppc64 | FileCheck %s
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@a = common global i32 0, align 4
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