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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214884 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adam Nemet
2014-08-05 17:22:47 +00:00
parent 77327b8520
commit 0ae6dc9c21
1 changed files with 6 additions and 4 deletions
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6
lib/Target/X86/X86InstrAVX512.td
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@@ -4466,13 +4466,15 @@ multiclass avx512_alignr<string OpcodeStr, RegisterClass RC,
def rri : AVX512AIi8<0x03, MRMSrcReg, (outs RC:$dst),
(ins RC:$src1, RC:$src2, i8imm:$src3),
!strconcat(OpcodeStr,
" \t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
" \t{$src3, $src2, $src1, $dst|"
"$dst, $src1, $src2, $src3}"),
[]>, EVEX_4V;
let mayLoad = 1 in
def rmi : AVX512AIi8<0x03, MRMSrcMem, (outs RC:$dst),
(ins RC:$src1, x86memop:$src2, i8imm:$src3),
!strconcat(OpcodeStr,
" \t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
" \t{$src3, $src2, $src1, $dst|"
"$dst, $src1, $src2, $src3}"),
[]>, EVEX_4V;
}
defm VALIGND : avx512_alignr<"valignd", VR512, i512mem>,