mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-17 20:29:31 +00:00
Convert AddedInstrMapType to contain AddedInstrns by value instead of by
pointer so that they do not all get leaked! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2188 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
f60c3fe8c8
commit
0b0ffa0800
@ -100,6 +100,8 @@ PhyRegAlloc::PhyRegAlloc(Function *F,
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PhyRegAlloc::~PhyRegAlloc() {
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for( unsigned int rc=0; rc < NumOfRegClasses; rc++)
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delete RegClassList[rc];
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AddedInstrMap.clear();
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}
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//----------------------------------------------------------------------------
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@ -464,11 +466,7 @@ void PhyRegAlloc::updateMachineCode()
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if (TM.getInstrInfo().isCall(Opcode) ||
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TM.getInstrInfo().isReturn(Opcode)) {
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AddedInstrns *AI = AddedInstrMap[ MInst];
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if ( !AI ) {
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AI = new AddedInstrns();
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AddedInstrMap[ MInst ] = AI;
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}
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AddedInstrns &AI = AddedInstrMap[MInst];
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// Tmp stack poistions are needed by some calls that have spilled args
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// So reset it before we call each such method
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@ -476,9 +474,9 @@ void PhyRegAlloc::updateMachineCode()
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mcInfo.popAllTempValues(TM);
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if (TM.getInstrInfo().isCall(Opcode))
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MRI.colorCallArgs(MInst, LRI, AI, *this, *BBI);
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MRI.colorCallArgs(MInst, LRI, &AI, *this, *BBI);
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else if (TM.getInstrInfo().isReturn(Opcode))
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MRI.colorRetValue(MInst, LRI, AI);
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MRI.colorRetValue(MInst, LRI, &AI);
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}
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@ -566,8 +564,8 @@ void PhyRegAlloc::updateMachineCode()
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// If there are instructions to be added, *before* this machine
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// instruction, add them now.
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//
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if( AddedInstrMap[ MInst ] ) {
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std::deque<MachineInstr *> &IBef = AddedInstrMap[MInst]->InstrnsBefore;
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if(AddedInstrMap.count(MInst)) {
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std::deque<MachineInstr *> &IBef = AddedInstrMap[MInst].InstrnsBefore;
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if( ! IBef.empty() ) {
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std::deque<MachineInstr *>::iterator AdIt;
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@ -590,8 +588,7 @@ void PhyRegAlloc::updateMachineCode()
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// If there are instructions to be added *after* this machine
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// instruction, add them now
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//
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if(AddedInstrMap[MInst] &&
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!AddedInstrMap[MInst]->InstrnsAfter.empty() ) {
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if (!AddedInstrMap[MInst].InstrnsAfter.empty()) {
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// if there are delay slots for this instruction, the instructions
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// added after it must really go after the delayed instruction(s)
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@ -611,14 +608,12 @@ void PhyRegAlloc::updateMachineCode()
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// Here we can add the "instructions after" to the current
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// instruction since there are no delay slots for this instruction
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std::deque<MachineInstr *> &IAft = AddedInstrMap[MInst]->InstrnsAfter;
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std::deque<MachineInstr *> &IAft = AddedInstrMap[MInst].InstrnsAfter;
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if( ! IAft.empty() ) {
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std::deque<MachineInstr *>::iterator AdIt;
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if (!IAft.empty()) {
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++MInstIterator; // advance to the next instruction
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std::deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA) {
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@ -678,15 +673,9 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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int TmpRegU = getUsableUniRegAtMI(RC, RegType, MInst,&LVSetBef, MIBef, MIAft);
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// get the added instructions for this instruciton
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AddedInstrns *AI = AddedInstrMap[ MInst ];
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if ( !AI ) {
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AI = new AddedInstrns();
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AddedInstrMap[ MInst ] = AI;
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}
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AddedInstrns &AI = AddedInstrMap[MInst];
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if( !isDef ) {
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if (!isDef) {
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// for a USE, we have to load the value of LR from stack to a TmpReg
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// and use the TmpReg as one operand of instruction
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@ -694,12 +683,12 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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AdIMid = MRI.cpMem2RegMI(MRI.getFramePointer(), SpillOff, TmpRegU,RegType);
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if(MIBef)
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AI->InstrnsBefore.push_back(MIBef);
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AI.InstrnsBefore.push_back(MIBef);
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AI->InstrnsBefore.push_back(AdIMid);
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AI.InstrnsBefore.push_back(AdIMid);
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if(MIAft)
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AI->InstrnsAfter.push_front(MIAft);
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AI.InstrnsAfter.push_front(MIAft);
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} else { // if this is a Def
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// for a DEF, we have to store the value produced by this instruction
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@ -709,12 +698,12 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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AdIMid = MRI.cpReg2MemMI(TmpRegU, MRI.getFramePointer(), SpillOff,RegType);
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if (MIBef)
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AI->InstrnsBefore.push_back(MIBef);
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AI.InstrnsBefore.push_back(MIBef);
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AI->InstrnsAfter.push_front(AdIMid);
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AI.InstrnsAfter.push_front(AdIMid);
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if (MIAft)
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AI->InstrnsAfter.push_front(MIAft);
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AI.InstrnsAfter.push_front(MIAft);
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} // if !DEF
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@ -918,22 +907,17 @@ void PhyRegAlloc::setRelRegsUsedByThisInst(RegClass *RC,
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// corresponding delayed instruction using the following method.
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//----------------------------------------------------------------------------
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void PhyRegAlloc:: move2DelayedInstr(const MachineInstr *OrigMI,
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const MachineInstr *DelayedMI) {
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void PhyRegAlloc::move2DelayedInstr(const MachineInstr *OrigMI,
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const MachineInstr *DelayedMI) {
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// "added after" instructions of the original instr
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std::deque<MachineInstr *> &OrigAft = AddedInstrMap[OrigMI]->InstrnsAfter;
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std::deque<MachineInstr *> &OrigAft = AddedInstrMap[OrigMI].InstrnsAfter;
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// "added instructions" of the delayed instr
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AddedInstrns *DelayAdI = AddedInstrMap[DelayedMI];
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if(! DelayAdI ) { // create a new "added after" if necessary
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DelayAdI = new AddedInstrns();
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AddedInstrMap[DelayedMI] = DelayAdI;
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}
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AddedInstrns &DelayAdI = AddedInstrMap[DelayedMI];
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// "added after" instructions of the delayed instr
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std::deque<MachineInstr *> &DelayedAft = DelayAdI->InstrnsAfter;
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std::deque<MachineInstr *> &DelayedAft = DelayAdI.InstrnsAfter;
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// go thru all the "added after instructions" of the original instruction
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// and append them to the "addded after instructions" of the delayed
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@ -1052,21 +1036,17 @@ void PhyRegAlloc::colorCallRetArgs()
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unsigned OpCode = CRMI->getOpCode();
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// get the added instructions for this Call/Ret instruciton
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AddedInstrns *AI = AddedInstrMap[ CRMI ];
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if ( !AI ) {
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AI = new AddedInstrns();
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AddedInstrMap[ CRMI ] = AI;
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}
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AddedInstrns &AI = AddedInstrMap[CRMI];
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// Tmp stack poistions are needed by some calls that have spilled args
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// Tmp stack positions are needed by some calls that have spilled args
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// So reset it before we call each such method
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//mcInfo.popAllTempValues(TM);
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if (TM.getInstrInfo().isCall(OpCode))
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MRI.colorCallArgs(CRMI, LRI, AI, *this);
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MRI.colorCallArgs(CRMI, LRI, &AI, *this);
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else if (TM.getInstrInfo().isReturn(OpCode))
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MRI.colorRetValue( CRMI, LRI, AI );
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MRI.colorRetValue(CRMI, LRI, &AI);
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else
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assert(0 && "Non Call/Ret instrn in CallRetInstrList\n");
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}
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@ -1083,11 +1063,7 @@ void PhyRegAlloc::colorIncomingArgs()
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const MachineInstr *FirstMI = FirstBB->getMachineInstrVec().front();
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assert(FirstMI && "No machine instruction in entry BB");
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AddedInstrns *AI = AddedInstrMap[FirstMI];
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if (!AI)
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AddedInstrMap[FirstMI] = AI = new AddedInstrns();
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MRI.colorMethodArgs(Meth, LRI, AI);
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MRI.colorMethodArgs(Meth, LRI, &AddedInstrMap[FirstMI]);
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}
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@ -48,14 +48,12 @@ namespace cfg { class LoopInfo; }
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// to store such instructions added before and after an existing instruction.
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//----------------------------------------------------------------------------
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class AddedInstrns
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{
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public:
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struct AddedInstrns {
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std::deque<MachineInstr*> InstrnsBefore;// Added insts BEFORE an existing inst
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std::deque<MachineInstr*> InstrnsAfter; // Added insts AFTER an existing inst
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};
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typedef std::hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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typedef std::map<const MachineInstr *, AddedInstrns> AddedInstrMapType;
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@ -100,6 +100,8 @@ PhyRegAlloc::PhyRegAlloc(Function *F,
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PhyRegAlloc::~PhyRegAlloc() {
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for( unsigned int rc=0; rc < NumOfRegClasses; rc++)
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delete RegClassList[rc];
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AddedInstrMap.clear();
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}
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//----------------------------------------------------------------------------
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@ -464,11 +466,7 @@ void PhyRegAlloc::updateMachineCode()
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if (TM.getInstrInfo().isCall(Opcode) ||
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TM.getInstrInfo().isReturn(Opcode)) {
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AddedInstrns *AI = AddedInstrMap[ MInst];
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if ( !AI ) {
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AI = new AddedInstrns();
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AddedInstrMap[ MInst ] = AI;
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}
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AddedInstrns &AI = AddedInstrMap[MInst];
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// Tmp stack poistions are needed by some calls that have spilled args
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// So reset it before we call each such method
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@ -476,9 +474,9 @@ void PhyRegAlloc::updateMachineCode()
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mcInfo.popAllTempValues(TM);
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if (TM.getInstrInfo().isCall(Opcode))
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MRI.colorCallArgs(MInst, LRI, AI, *this, *BBI);
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MRI.colorCallArgs(MInst, LRI, &AI, *this, *BBI);
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else if (TM.getInstrInfo().isReturn(Opcode))
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MRI.colorRetValue(MInst, LRI, AI);
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MRI.colorRetValue(MInst, LRI, &AI);
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}
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@ -566,8 +564,8 @@ void PhyRegAlloc::updateMachineCode()
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// If there are instructions to be added, *before* this machine
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// instruction, add them now.
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//
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if( AddedInstrMap[ MInst ] ) {
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std::deque<MachineInstr *> &IBef = AddedInstrMap[MInst]->InstrnsBefore;
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if(AddedInstrMap.count(MInst)) {
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std::deque<MachineInstr *> &IBef = AddedInstrMap[MInst].InstrnsBefore;
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if( ! IBef.empty() ) {
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std::deque<MachineInstr *>::iterator AdIt;
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@ -590,8 +588,7 @@ void PhyRegAlloc::updateMachineCode()
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// If there are instructions to be added *after* this machine
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// instruction, add them now
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//
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if(AddedInstrMap[MInst] &&
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!AddedInstrMap[MInst]->InstrnsAfter.empty() ) {
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if (!AddedInstrMap[MInst].InstrnsAfter.empty()) {
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// if there are delay slots for this instruction, the instructions
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// added after it must really go after the delayed instruction(s)
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@ -611,14 +608,12 @@ void PhyRegAlloc::updateMachineCode()
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// Here we can add the "instructions after" to the current
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// instruction since there are no delay slots for this instruction
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std::deque<MachineInstr *> &IAft = AddedInstrMap[MInst]->InstrnsAfter;
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std::deque<MachineInstr *> &IAft = AddedInstrMap[MInst].InstrnsAfter;
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if( ! IAft.empty() ) {
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std::deque<MachineInstr *>::iterator AdIt;
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if (!IAft.empty()) {
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++MInstIterator; // advance to the next instruction
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std::deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA) {
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@ -678,15 +673,9 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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int TmpRegU = getUsableUniRegAtMI(RC, RegType, MInst,&LVSetBef, MIBef, MIAft);
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// get the added instructions for this instruciton
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AddedInstrns *AI = AddedInstrMap[ MInst ];
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if ( !AI ) {
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AI = new AddedInstrns();
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AddedInstrMap[ MInst ] = AI;
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}
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AddedInstrns &AI = AddedInstrMap[MInst];
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if( !isDef ) {
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if (!isDef) {
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// for a USE, we have to load the value of LR from stack to a TmpReg
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// and use the TmpReg as one operand of instruction
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@ -694,12 +683,12 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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AdIMid = MRI.cpMem2RegMI(MRI.getFramePointer(), SpillOff, TmpRegU,RegType);
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if(MIBef)
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AI->InstrnsBefore.push_back(MIBef);
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AI.InstrnsBefore.push_back(MIBef);
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AI->InstrnsBefore.push_back(AdIMid);
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AI.InstrnsBefore.push_back(AdIMid);
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if(MIAft)
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AI->InstrnsAfter.push_front(MIAft);
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AI.InstrnsAfter.push_front(MIAft);
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} else { // if this is a Def
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// for a DEF, we have to store the value produced by this instruction
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@ -709,12 +698,12 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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AdIMid = MRI.cpReg2MemMI(TmpRegU, MRI.getFramePointer(), SpillOff,RegType);
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if (MIBef)
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AI->InstrnsBefore.push_back(MIBef);
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AI.InstrnsBefore.push_back(MIBef);
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AI->InstrnsAfter.push_front(AdIMid);
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AI.InstrnsAfter.push_front(AdIMid);
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if (MIAft)
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AI->InstrnsAfter.push_front(MIAft);
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AI.InstrnsAfter.push_front(MIAft);
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} // if !DEF
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@ -918,22 +907,17 @@ void PhyRegAlloc::setRelRegsUsedByThisInst(RegClass *RC,
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// corresponding delayed instruction using the following method.
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//----------------------------------------------------------------------------
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void PhyRegAlloc:: move2DelayedInstr(const MachineInstr *OrigMI,
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const MachineInstr *DelayedMI) {
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void PhyRegAlloc::move2DelayedInstr(const MachineInstr *OrigMI,
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const MachineInstr *DelayedMI) {
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// "added after" instructions of the original instr
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std::deque<MachineInstr *> &OrigAft = AddedInstrMap[OrigMI]->InstrnsAfter;
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std::deque<MachineInstr *> &OrigAft = AddedInstrMap[OrigMI].InstrnsAfter;
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// "added instructions" of the delayed instr
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AddedInstrns *DelayAdI = AddedInstrMap[DelayedMI];
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if(! DelayAdI ) { // create a new "added after" if necessary
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DelayAdI = new AddedInstrns();
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AddedInstrMap[DelayedMI] = DelayAdI;
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}
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AddedInstrns &DelayAdI = AddedInstrMap[DelayedMI];
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// "added after" instructions of the delayed instr
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std::deque<MachineInstr *> &DelayedAft = DelayAdI->InstrnsAfter;
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std::deque<MachineInstr *> &DelayedAft = DelayAdI.InstrnsAfter;
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// go thru all the "added after instructions" of the original instruction
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// and append them to the "addded after instructions" of the delayed
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@ -1052,21 +1036,17 @@ void PhyRegAlloc::colorCallRetArgs()
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unsigned OpCode = CRMI->getOpCode();
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// get the added instructions for this Call/Ret instruciton
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AddedInstrns *AI = AddedInstrMap[ CRMI ];
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if ( !AI ) {
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AI = new AddedInstrns();
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AddedInstrMap[ CRMI ] = AI;
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}
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AddedInstrns &AI = AddedInstrMap[CRMI];
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// Tmp stack poistions are needed by some calls that have spilled args
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// Tmp stack positions are needed by some calls that have spilled args
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// So reset it before we call each such method
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//mcInfo.popAllTempValues(TM);
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if (TM.getInstrInfo().isCall(OpCode))
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MRI.colorCallArgs(CRMI, LRI, AI, *this);
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MRI.colorCallArgs(CRMI, LRI, &AI, *this);
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else if (TM.getInstrInfo().isReturn(OpCode))
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MRI.colorRetValue( CRMI, LRI, AI );
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MRI.colorRetValue(CRMI, LRI, &AI);
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else
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assert(0 && "Non Call/Ret instrn in CallRetInstrList\n");
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}
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@ -1083,11 +1063,7 @@ void PhyRegAlloc::colorIncomingArgs()
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const MachineInstr *FirstMI = FirstBB->getMachineInstrVec().front();
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assert(FirstMI && "No machine instruction in entry BB");
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AddedInstrns *AI = AddedInstrMap[FirstMI];
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if (!AI)
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AddedInstrMap[FirstMI] = AI = new AddedInstrns();
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MRI.colorMethodArgs(Meth, LRI, AI);
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MRI.colorMethodArgs(Meth, LRI, &AddedInstrMap[FirstMI]);
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}
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@ -48,14 +48,12 @@ namespace cfg { class LoopInfo; }
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// to store such instructions added before and after an existing instruction.
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//----------------------------------------------------------------------------
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class AddedInstrns
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{
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public:
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struct AddedInstrns {
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std::deque<MachineInstr*> InstrnsBefore;// Added insts BEFORE an existing inst
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std::deque<MachineInstr*> InstrnsAfter; // Added insts AFTER an existing inst
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};
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typedef std::hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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typedef std::map<const MachineInstr *, AddedInstrns> AddedInstrMapType;
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@ -1327,13 +1327,13 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
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// adding them to the front of InstrnsBefore
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if(AdIAftCC)
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PRA.AddedInstrMap[MInst]->InstrnsBefore.push_front(AdIAftCC);
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PRA.AddedInstrMap[MInst].InstrnsBefore.push_front(AdIAftCC);
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AdICpCC = cpCCR2IntMI(FreeIntReg);
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PRA.AddedInstrMap[MInst]->InstrnsBefore.push_front(AdICpCC);
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PRA.AddedInstrMap[MInst].InstrnsBefore.push_front(AdICpCC);
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if(AdIBefCC)
|
||||
PRA.AddedInstrMap[MInst]->InstrnsBefore.push_front(AdIBefCC);
|
||||
PRA.AddedInstrMap[MInst].InstrnsBefore.push_front(AdIBefCC);
|
||||
|
||||
if(DEBUG_RA) {
|
||||
cerr << "\n!! Inserted caller saving (push) inst for %ccr:";
|
||||
@ -1345,7 +1345,7 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
|
||||
} else {
|
||||
// for any other register type, just add the push inst
|
||||
AdIBef = cpReg2MemMI(Reg, getFramePointer(), StackOff, RegType );
|
||||
PRA.AddedInstrMap[MInst]->InstrnsBefore.push_front(AdIBef);
|
||||
PRA.AddedInstrMap[MInst].InstrnsBefore.push_front(AdIBef);
|
||||
}
|
||||
|
||||
|
||||
@ -1362,13 +1362,13 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
|
||||
IntRegType, MInst, &LVSetAft, AdIBefCC, AdIAftCC);
|
||||
|
||||
if(AdIBefCC)
|
||||
PRA.AddedInstrMap[MInst]->InstrnsAfter.push_back(AdIBefCC);
|
||||
PRA.AddedInstrMap[MInst].InstrnsAfter.push_back(AdIBefCC);
|
||||
|
||||
AdICpCC = cpInt2CCRMI(FreeIntReg);
|
||||
PRA.AddedInstrMap[MInst]->InstrnsAfter.push_back(AdICpCC);
|
||||
PRA.AddedInstrMap[MInst].InstrnsAfter.push_back(AdICpCC);
|
||||
|
||||
if(AdIAftCC)
|
||||
PRA.AddedInstrMap[MInst]->InstrnsAfter.push_back(AdIAftCC);
|
||||
PRA.AddedInstrMap[MInst].InstrnsAfter.push_back(AdIAftCC);
|
||||
|
||||
if(DEBUG_RA) {
|
||||
|
||||
@ -1381,7 +1381,7 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
|
||||
} else {
|
||||
// for any other register type, just add the pop inst
|
||||
AdIAft = cpMem2RegMI(getFramePointer(), StackOff, Reg, RegType );
|
||||
PRA.AddedInstrMap[MInst]->InstrnsAfter.push_back(AdIAft);
|
||||
PRA.AddedInstrMap[MInst].InstrnsAfter.push_back(AdIAft);
|
||||
}
|
||||
|
||||
PushedRegSet.insert(Reg);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user