mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
Make -print-machineinstrs more readable.
- Be consistent when referring to MachineBasicBlocks: BB#0. - Be consistent when referring to virtual registers: %reg1024. - Be consistent when referring to unknown physical registers: %physreg10. - Be consistent when referring to known physical registers: %RAX - Be consistent when referring to register 0: %reg0 - Be consistent when printing alignments: align=16 - Print jump table contents. - Don't print host addresses, in general. - and various other cleanups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85682 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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499a9377a3
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@ -20,6 +20,7 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/LeakDetector.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Assembly/Writer.h"
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#include <algorithm>
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using namespace llvm;
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@ -161,11 +162,11 @@ void MachineBasicBlock::dump() const {
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static inline void OutputReg(raw_ostream &os, unsigned RegNo,
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const TargetRegisterInfo *TRI = 0) {
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if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) {
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if (RegNo != 0 && TargetRegisterInfo::isPhysicalRegister(RegNo)) {
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if (TRI)
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os << " %" << TRI->get(RegNo).Name;
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else
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os << " %mreg(" << RegNo << ")";
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os << " %physreg" << RegNo;
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} else
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os << " %reg" << RegNo;
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}
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@ -178,19 +179,23 @@ void MachineBasicBlock::print(raw_ostream &OS) const {
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return;
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}
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const BasicBlock *LBB = getBasicBlock();
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if (Alignment) { OS << "Alignment " << Alignment << "\n"; }
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OS << "BB#" << getNumber() << ": ";
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const char *Comma = "";
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if (const BasicBlock *LBB = getBasicBlock()) {
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OS << Comma << "derived from LLVM BB ";
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WriteAsOperand(OS, LBB, /*PrintType=*/false);
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Comma = ", ";
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}
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if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
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if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
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OS << '\n';
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if (LBB) OS << LBB->getName() << ": ";
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OS << (const void*)this
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<< ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber();
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if (Alignment) OS << ", Alignment " << Alignment;
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if (isLandingPad()) OS << ", EH LANDING PAD";
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if (hasAddressTaken()) OS << ", ADDRESS TAKEN";
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OS << ":\n";
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const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
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if (!livein_empty()) {
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OS << "Live Ins:";
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OS << " Live Ins:";
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for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
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OutputReg(OS, *I, TRI);
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OS << '\n';
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@ -199,7 +204,7 @@ void MachineBasicBlock::print(raw_ostream &OS) const {
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if (!pred_empty()) {
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OS << " Predecessors according to CFG:";
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for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
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OS << ' ' << *PI << " (#" << (*PI)->getNumber() << ')';
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OS << " BB#" << (*PI)->getNumber();
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OS << '\n';
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}
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@ -212,7 +217,7 @@ void MachineBasicBlock::print(raw_ostream &OS) const {
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if (!succ_empty()) {
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OS << " Successors according to CFG:";
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for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI)
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OS << ' ' << *SI << " (#" << (*SI)->getNumber() << ')';
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OS << " BB#" << (*SI)->getNumber();
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OS << '\n';
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}
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}
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@ -52,7 +52,7 @@ namespace {
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}
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bool runOnMachineFunction(MachineFunction &MF) {
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OS << Banner;
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OS << "# " << Banner << ":\n";
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MF.print(OS);
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return false;
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}
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@ -303,7 +303,7 @@ void MachineFunction::dump() const {
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}
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void MachineFunction::print(raw_ostream &OS) const {
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OS << "# Machine code for " << Fn->getName() << "():\n";
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OS << "# Machine code for function " << Fn->getName() << ":\n";
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// Print Frame Information
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FrameInfo->print(*this, OS);
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@ -317,34 +317,43 @@ void MachineFunction::print(raw_ostream &OS) const {
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const TargetRegisterInfo *TRI = getTarget().getRegisterInfo();
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if (RegInfo && !RegInfo->livein_empty()) {
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OS << "Live Ins:";
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OS << "Function Live Ins: ";
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for (MachineRegisterInfo::livein_iterator
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I = RegInfo->livein_begin(), E = RegInfo->livein_end(); I != E; ++I) {
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if (TRI)
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OS << " " << TRI->getName(I->first);
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OS << "%" << TRI->getName(I->first);
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else
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OS << " Reg #" << I->first;
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OS << " %physreg" << I->first;
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if (I->second)
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OS << " in VR#" << I->second << ' ';
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OS << " in reg%" << I->second;
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if (next(I) != E)
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OS << ", ";
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}
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OS << '\n';
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}
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if (RegInfo && !RegInfo->liveout_empty()) {
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OS << "Live Outs:";
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OS << "Function Live Outs: ";
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for (MachineRegisterInfo::liveout_iterator
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I = RegInfo->liveout_begin(), E = RegInfo->liveout_end(); I != E; ++I)
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I = RegInfo->liveout_begin(), E = RegInfo->liveout_end(); I != E; ++I){
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if (TRI)
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OS << ' ' << TRI->getName(*I);
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OS << '%' << TRI->getName(*I);
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else
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OS << " Reg #" << *I;
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OS << "%physreg" << *I;
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if (next(I) != E)
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OS << " ";
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}
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OS << '\n';
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}
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for (const_iterator BB = begin(), E = end(); BB != E; ++BB)
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for (const_iterator BB = begin(), E = end(); BB != E; ++BB) {
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OS << '\n';
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BB->print(OS);
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}
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OS << "\n# End machine code for " << Fn->getName() << "().\n\n";
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OS << "\n# End machine code for function " << Fn->getName() << ".\n\n";
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}
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namespace llvm {
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@ -471,12 +480,16 @@ MachineFrameInfo::getPristineRegs(const MachineBasicBlock *MBB) const {
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void MachineFrameInfo::print(const MachineFunction &MF, raw_ostream &OS) const{
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if (Objects.empty()) return;
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const TargetFrameInfo *FI = MF.getTarget().getFrameInfo();
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int ValOffset = (FI ? FI->getOffsetOfLocalArea() : 0);
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OS << "Frame Objects:\n";
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for (unsigned i = 0, e = Objects.size(); i != e; ++i) {
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const StackObject &SO = Objects[i];
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OS << " <fi#" << (int)(i-NumFixedObjects) << ">: ";
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OS << " fi#" << (int)(i-NumFixedObjects) << ": ";
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if (SO.Size == ~0ULL) {
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OS << "dead\n";
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continue;
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@ -484,15 +497,14 @@ void MachineFrameInfo::print(const MachineFunction &MF, raw_ostream &OS) const{
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if (SO.Size == 0)
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OS << "variable sized";
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else
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OS << "size is " << SO.Size << " byte" << (SO.Size != 1 ? "s," : ",");
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OS << " alignment is " << SO.Alignment << " byte"
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<< (SO.Alignment != 1 ? "s," : ",");
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OS << "size=" << SO.Size;
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OS << ", align=" << SO.Alignment;
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if (i < NumFixedObjects)
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OS << " fixed";
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OS << ", fixed";
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if (i < NumFixedObjects || SO.SPOffset != -1) {
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int64_t Off = SO.SPOffset - ValOffset;
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OS << " at location [SP";
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OS << ", at location [SP";
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if (Off > 0)
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OS << "+" << Off;
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else if (Off < 0)
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@ -501,9 +513,6 @@ void MachineFrameInfo::print(const MachineFunction &MF, raw_ostream &OS) const{
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}
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OS << "\n";
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}
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if (HasVarSizedObjects)
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OS << " Stack frame contains variable sized objects\n";
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}
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void MachineFrameInfo::dump(const MachineFunction &MF) const {
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@ -547,12 +556,17 @@ MachineJumpTableInfo::ReplaceMBBInJumpTables(MachineBasicBlock *Old,
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}
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void MachineJumpTableInfo::print(raw_ostream &OS) const {
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// FIXME: this is lame, maybe we could print out the MBB numbers or something
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// like {1, 2, 4, 5, 3, 0}
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if (JumpTables.empty()) return;
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OS << "Jump Tables:\n";
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for (unsigned i = 0, e = JumpTables.size(); i != e; ++i) {
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OS << " <jt#" << i << "> has " << JumpTables[i].MBBs.size()
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<< " entries\n";
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OS << " jt#" << i << ": ";
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for (unsigned j = 0, f = JumpTables[i].MBBs.size(); j != f; ++j)
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OS << " BB#" << JumpTables[i].MBBs[j]->getNumber();
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}
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OS << '\n';
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}
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void MachineJumpTableInfo::dump() const { print(errs()); }
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@ -664,13 +678,16 @@ unsigned MachineConstantPool::getConstantPoolIndex(MachineConstantPoolValue *V,
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}
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void MachineConstantPool::print(raw_ostream &OS) const {
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if (Constants.empty()) return;
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OS << "Constant Pool:\n";
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for (unsigned i = 0, e = Constants.size(); i != e; ++i) {
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OS << " <cp#" << i << "> is";
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OS << " cp#" << i << ": ";
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if (Constants[i].isMachineConstantPoolEntry())
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Constants[i].Val.MachineCPVal->print(OS);
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else
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OS << *(Value*)Constants[i].Val.ConstVal;
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OS << " , alignment=" << Constants[i].getAlignment();
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OS << ", align=" << Constants[i].getAlignment();
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OS << "\n";
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}
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}
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@ -205,7 +205,7 @@ void MachineOperand::print(raw_ostream &OS, const TargetMachine *TM) const {
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if (TM)
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OS << "%" << TM->getRegisterInfo()->get(getReg()).Name;
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else
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OS << "%mreg" << getReg();
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OS << "%physreg" << getReg();
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}
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if (getSubReg() != 0)
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@ -251,9 +251,7 @@ void MachineOperand::print(raw_ostream &OS, const TargetMachine *TM) const {
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OS << getFPImm()->getValueAPF().convertToDouble();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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OS << "mbb<"
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<< ((Value*)getMBB()->getBasicBlock())->getName()
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<< "," << (void*)getMBB() << '>';
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OS << "<BB#" << getMBB()->getNumber() << ">";
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break;
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case MachineOperand::MO_FrameIndex:
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OS << "<fi#" << getIndex() << '>';
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@ -277,10 +275,8 @@ void MachineOperand::print(raw_ostream &OS, const TargetMachine *TM) const {
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OS << '>';
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break;
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case MachineOperand::MO_BlockAddress:
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OS << "<blockaddress: ";
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WriteAsOperand(OS, getBlockAddress()->getFunction(), /*PrintType=*/false);
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OS << ", ";
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WriteAsOperand(OS, getBlockAddress()->getBasicBlock(), /*PrintType=*/false);
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OS << "<";
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WriteAsOperand(OS, getBlockAddress(), /*PrintType=*/false);
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OS << '>';
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break;
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default:
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@ -1064,16 +1060,24 @@ void MachineInstr::dump() const {
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}
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void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const {
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// Specialize printing if op#0 is definition
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unsigned StartOp = 0;
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if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
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getOperand(0).print(OS, TM);
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OS << " = ";
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++StartOp; // Don't print this operand again!
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unsigned StartOp = 0, e = getNumOperands();
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// Print explicitly defined operands on the left of an assignment syntax.
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for (; StartOp < e && getOperand(StartOp).isReg() &&
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getOperand(StartOp).isDef() &&
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!getOperand(StartOp).isImplicit();
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++StartOp) {
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if (StartOp != 0) OS << ", ";
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getOperand(StartOp).print(OS, TM);
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}
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if (StartOp != 0)
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OS << " = ";
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// Print the opcode name.
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OS << getDesc().getName();
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// Print the rest of the operands.
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for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
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if (i != StartOp)
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OS << ",";
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@ -1081,8 +1085,11 @@ void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const {
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getOperand(i).print(OS, TM);
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}
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bool HaveSemi = false;
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if (!memoperands_empty()) {
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OS << ", Mem:";
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if (!HaveSemi) OS << ";"; HaveSemi = true;
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OS << " mem:";
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for (mmo_iterator i = memoperands_begin(), e = memoperands_end();
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i != e; ++i) {
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OS << **i;
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@ -1092,14 +1099,16 @@ void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const {
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}
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if (!debugLoc.isUnknown()) {
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if (!HaveSemi) OS << ";"; HaveSemi = true;
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// TODO: print InlinedAtLoc information
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const MachineFunction *MF = getParent()->getParent();
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DebugLocTuple DLT = MF->getDebugLocTuple(debugLoc);
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DICompileUnit CU(DLT.Scope);
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if (!CU.isNull())
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OS << " [dbg: "
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<< CU.getDirectory() << '/' << CU.getFilename() << ","
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<< DLT.Line << ","
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<< DLT.Col << "]";
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OS << " dbg:" << CU.getDirectory() << '/' << CU.getFilename() << ":"
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<< DLT.Line << ":" << DLT.Col;
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}
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OS << "\n";
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report(msg, MBB->getParent());
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*OS << "- basic block: " << MBB->getBasicBlock()->getNameStr()
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<< " " << (void*)MBB
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<< " (#" << MBB->getNumber() << ")\n";
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<< " (BB#" << MBB->getNumber() << ")\n";
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}
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void MachineVerifier::report(const char *msg, const MachineInstr *MI) {
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@ -745,7 +745,7 @@ void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
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PrE = MBB->pred_end(); PrI != PrE; ++PrI) {
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if (!seen.count(*PrI)) {
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report("Missing PHI operand", BBI);
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*OS << "MBB #" << (*PrI)->getNumber()
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*OS << "BB#" << (*PrI)->getNumber()
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<< " is a predecessor according to the CFG.\n";
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}
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}
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@ -780,7 +780,7 @@ void MachineVerifier::visitMachineFunctionAfter() {
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report("Live-in physical register is not live-out from predecessor",
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MFI);
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*OS << "Register " << TRI->getName(*I)
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<< " is not live-out from MBB #" << (*PrI)->getNumber()
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<< " is not live-out from BB#" << (*PrI)->getNumber()
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<< ".\n";
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}
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}
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@ -258,7 +258,7 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
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if (bbcnt++ % DebugDiv != DebugMod)
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continue;
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errs() << "*** DEBUG scheduling " << Fn.getFunction()->getNameStr() <<
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":MBB ID#" << MBB->getNumber() << " ***\n";
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":BB#" << MBB->getNumber() << " ***\n";
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}
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#endif
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@ -453,7 +453,7 @@ bool SchedulePostRATDList::ToggleKillFlag(MachineInstr *MI,
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/// incorrect by instruction reordering.
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///
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void SchedulePostRATDList::FixupKills(MachineBasicBlock *MBB) {
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DEBUG(errs() << "Fixup kills for BB ID#" << MBB->getNumber() << '\n');
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DEBUG(errs() << "Fixup kills for BB#" << MBB->getNumber() << '\n');
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std::set<unsigned> killedRegs;
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BitVector ReservedRegs = TRI->getReservedRegs(MF);
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@ -5754,9 +5754,9 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
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} else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
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if (G && R->getReg() &&
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TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
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OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
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OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
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} else {
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OS << " #" << R->getReg();
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OS << " %reg" << R->getReg();
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}
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} else if (const ExternalSymbolSDNode *ES =
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dyn_cast<ExternalSymbolSDNode>(this)) {
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