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Factor out more code into addCommonCodeGenPasses. The JIT wasn't

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previously running CodePlacementOpt. Also print headers before
each dump in -print-machineinstrs mode, so that it's clear which
dump is which.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85681 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-10-31 20:17:39 +00:00
parent c1dc35094e
commit 499a9377a3
1 changed files with 30 additions and 32 deletions
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62
lib/CodeGen/LLVMTargetMachine.cpp
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@ -68,18 +68,6 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
if (addCommonCodeGenPasses(PM, OptLevel))
return FileModel::Error;
// Fold redundant debug labels.
PM.add(createDebugLabelFoldingPass());
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(errs()));
if (addPreEmitPass(PM, OptLevel) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(errs()));
if (OptLevel != CodeGenOpt::None)
PM.add(createCodePlacementOptPass());
switch (FileType) {
default:
break;
@ -171,9 +159,6 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
if (addCommonCodeGenPasses(PM, OptLevel))
return true;
if (addPreEmitPass(PM, OptLevel) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(errs()));
addCodeEmitter(PM, OptLevel, MCE);
if (PrintEmittedAsm)
addAssemblyEmitter(PM, OptLevel, true, ferrs());
@ -196,9 +181,6 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
if (addCommonCodeGenPasses(PM, OptLevel))
return true;
if (addPreEmitPass(PM, OptLevel) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(errs()));
addCodeEmitter(PM, OptLevel, JCE);
if (PrintEmittedAsm)
addAssemblyEmitter(PM, OptLevel, true, ferrs());
@ -209,9 +191,10 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
}
static void printAndVerify(PassManagerBase &PM,
const char *Banner,
bool allowDoubleDefs = false) {
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(errs()));
PM.add(createMachineFunctionPrinterPass(errs(), Banner));
if (VerifyMachineCode)
PM.add(createMachineVerifierPass(allowDoubleDefs));
@ -278,61 +261,76 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
return true;
// Print the instruction selected machine code...
printAndVerify(PM, /* allowDoubleDefs= */ true);
printAndVerify(PM, "After Instruction Selection",
/* allowDoubleDefs= */ true);
if (OptLevel != CodeGenOpt::None) {
PM.add(createMachineLICMPass());
PM.add(createMachineSinkingPass());
printAndVerify(PM, /* allowDoubleDefs= */ true);
printAndVerify(PM, "After MachineLICM and MachineSinking",
/* allowDoubleDefs= */ true);
}
// Run pre-ra passes.
if (addPreRegAlloc(PM, OptLevel))
printAndVerify(PM, /* allowDoubleDefs= */ true);
printAndVerify(PM, "After PreRegAlloc passes",
/* allowDoubleDefs= */ true);
// Perform register allocation.
PM.add(createRegisterAllocator());
printAndVerify(PM, "After Register Allocation");
// Perform stack slot coloring.
if (OptLevel != CodeGenOpt::None)
if (OptLevel != CodeGenOpt::None) {
// FIXME: Re-enable coloring with register when it's capable of adding
// kill markers.
PM.add(createStackSlotColoringPass(false));
printAndVerify(PM); // Print the register-allocated code
printAndVerify(PM, "After StackSlotColoring");
}
// Run post-ra passes.
if (addPostRegAlloc(PM, OptLevel))
printAndVerify(PM);
printAndVerify(PM, "After PostRegAlloc passes");
PM.add(createLowerSubregsPass());
printAndVerify(PM);
printAndVerify(PM, "After LowerSubregs");
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
printAndVerify(PM);
printAndVerify(PM, "After PrologEpilogCodeInserter");
// Run pre-sched2 passes.
if (addPreSched2(PM, OptLevel))
printAndVerify(PM);
printAndVerify(PM, "After PreSched2 passes");
// Second pass scheduler.
if (OptLevel != CodeGenOpt::None) {
PM.add(createPostRAScheduler(OptLevel));
printAndVerify(PM);
printAndVerify(PM, "After PostRAScheduler");
}
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (OptLevel != CodeGenOpt::None) {
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
printAndVerify(PM);
printAndVerify(PM, "After BranchFolding");
}
PM.add(createGCMachineCodeAnalysisPass());
printAndVerify(PM);
if (PrintGCInfo)
PM.add(createGCInfoPrinter(errs()));
// Fold redundant debug labels.
PM.add(createDebugLabelFoldingPass());
printAndVerify(PM, "After DebugLabelFolding");
if (addPreEmitPass(PM, OptLevel))
printAndVerify(PM, "After PreEmit passes");
if (OptLevel != CodeGenOpt::None) {
PM.add(createCodePlacementOptPass());
printAndVerify(PM, "After CodePlacementOpt");
}
return false;
}