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replace switch stmt with an assert, generate li 0 instead of lis 0 for 0,

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to make the code follow people's expectations better.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22861 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-08-18 17:16:52 +00:00
parent 3285aadce9
commit 0c09a411e0
1 changed files with 15 additions and 18 deletions
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33
lib/Target/PowerPC/PPCISelPattern.cpp
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@ -1732,26 +1732,23 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
return Result;
}
case ISD::Constant:
switch (N.getValueType()) {
default: assert(0 && "Cannot use constants of this type!");
case MVT::i32:
{
int v = (int)cast<ConstantSDNode>(N)->getSignExtended();
unsigned Hi = Hi16(v);
unsigned Lo = Lo16(v);
if (Hi && Lo) {
Tmp1 = MakeIntReg();
BuildMI(BB, PPC::LIS, 1, Tmp1).addSImm(Hi);
BuildMI(BB, PPC::ORI, 2, Result).addReg(Tmp1).addImm(Lo);
} else if (Lo) {
BuildMI(BB, PPC::LI, 1, Result).addSImm(Lo);
} else {
BuildMI(BB, PPC::LIS, 1, Result).addSImm(Hi);
}
}
case ISD::Constant: {
assert(N.getValueType() == MVT::i32 &&
"Only i32 constants are legal on this target!");
int v = (int)cast<ConstantSDNode>(N)->getValue();
unsigned Hi = Hi16(v);
unsigned Lo = Lo16(v);
if (Hi && Lo) {
Tmp1 = MakeIntReg();
BuildMI(BB, PPC::LIS, 1, Tmp1).addSImm(Hi);
BuildMI(BB, PPC::ORI, 2, Result).addReg(Tmp1).addImm(Lo);
} else if (Hi) {
BuildMI(BB, PPC::LIS, 1, Result).addSImm(Hi);
} else {
BuildMI(BB, PPC::LI, 1, Result).addSImm(Lo);
}
return Result;
}
case ISD::ConstantFP: {
ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);