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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127592 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-03-14 17:32:49 +00:00
parent dcfd404e3c
commit 0c4d44aa7a
1 changed files with 46 additions and 46 deletions
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92
utils/TableGen/CodeGenInstruction.h
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@ -26,7 +26,7 @@ namespace llvm {
class DagInit;
class CodeGenTarget;
class StringRef;
class CGIOperandList {
public:
class ConstraintInfo {
@ -34,25 +34,25 @@ namespace llvm {
unsigned OtherTiedOperand;
public:
ConstraintInfo() : Kind(None) {}
static ConstraintInfo getEarlyClobber() {
ConstraintInfo I;
I.Kind = EarlyClobber;
I.OtherTiedOperand = 0;
return I;
}
static ConstraintInfo getTied(unsigned Op) {
ConstraintInfo I;
I.Kind = Tied;
I.OtherTiedOperand = Op;
return I;
}
bool isNone() const { return Kind == None; }
bool isEarlyClobber() const { return Kind == EarlyClobber; }
bool isTied() const { return Kind == Tied; }
unsigned getTiedOperand() const {
assert(isTied());
return OtherTiedOperand;
@ -65,19 +65,19 @@ namespace llvm {
/// Rec - The definition this operand is declared as.
///
Record *Rec;
/// Name - If this operand was assigned a symbolic name, this is it,
/// otherwise, it's empty.
std::string Name;
/// PrinterMethodName - The method used to print operands of this type in
/// the asmprinter.
std::string PrinterMethodName;
/// EncoderMethodName - The method used to get the machine operand value
/// for binary encoding. "getMachineOpValue" by default.
std::string EncoderMethodName;
/// MIOperandNo - Currently (this is meant to be phased out), some logical
/// operands correspond to multiple MachineInstr operands. In the X86
/// target for example, one address operand is represented as 4
@ -86,27 +86,27 @@ namespace llvm {
/// does, this contains the MI operand index of this operand.
unsigned MIOperandNo;
unsigned MINumOperands; // The number of operands.
/// DoNotEncode - Bools are set to true in this vector for each operand in
/// the DisableEncoding list. These should not be emitted by the code
/// emitter.
std::vector<bool> DoNotEncode;
/// MIOperandInfo - Default MI operand type. Note an operand may be made
/// up of multiple MI operands.
DagInit *MIOperandInfo;
/// Constraint info for this operand. This operand can have pieces, so we
/// track constraint info for each.
std::vector<ConstraintInfo> Constraints;
OperandInfo(Record *R, const std::string &N, const std::string &PMN,
const std::string &EMN, unsigned MION, unsigned MINO,
DagInit *MIOI)
: Rec(R), Name(N), PrinterMethodName(PMN), EncoderMethodName(EMN),
MIOperandNo(MION), MINumOperands(MINO), MIOperandInfo(MIOI) {}
/// getTiedOperand - If this operand is tied to another one, return the
/// other operand number. Otherwise, return -1.
int getTiedRegister() const {
@ -117,43 +117,43 @@ namespace llvm {
return -1;
}
};
CGIOperandList(Record *D);
Record *TheDef; // The actual record containing this OperandList.
/// NumDefs - Number of def operands declared, this is the number of
/// elements in the instruction's (outs) list.
///
unsigned NumDefs;
/// OperandList - The list of declared operands, along with their declared
/// type (which is a record).
std::vector<OperandInfo> OperandList;
// Information gleaned from the operand list.
bool isPredicable;
bool hasOptionalDef;
bool isVariadic;
// Provide transparent accessors to the operand list.
unsigned size() const { return OperandList.size(); }
const OperandInfo &operator[](unsigned i) const { return OperandList[i]; }
OperandInfo &operator[](unsigned i) { return OperandList[i]; }
OperandInfo &back() { return OperandList.back(); }
const OperandInfo &back() const { return OperandList.back(); }
/// getOperandNamed - Return the index of the operand with the specified
/// non-empty name. If the instruction does not have an operand with the
/// specified name, throw an exception.
unsigned getOperandNamed(StringRef Name) const;
/// hasOperandNamed - Query whether the instruction has an operand of the
/// given name. If so, return true and set OpIdx to the index of the
/// operand. Otherwise, return false.
bool hasOperandNamed(StringRef Name, unsigned &OpIdx) const;
/// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
/// where $foo is a whole operand and $foo.bar refers to a suboperand.
/// This throws an exception if the name is invalid. If AllowWholeOp is
@ -161,13 +161,13 @@ namespace llvm {
/// not.
std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op,
bool AllowWholeOp = true);
/// getFlattenedOperandNumber - Flatten a operand/suboperand pair into a
/// flat machineinstr operand #.
unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const {
return OperandList[Op.first].MIOperandNo + Op.second;
}
/// getSubOperandNumber - Unflatten a operand number into an
/// operand/suboperand pair.
std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const {
@ -177,8 +177,8 @@ namespace llvm {
return std::make_pair(i, Op-OperandList[i].MIOperandNo);
}
}
/// isFlatOperandNotEmitted - Return true if the specified flat operand #
/// should not be emitted with the code emitter.
bool isFlatOperandNotEmitted(unsigned FlatOpNo) const {
@ -187,10 +187,10 @@ namespace llvm {
return OperandList[Op.first].DoNotEncode[Op.second];
return false;
}
void ProcessDisableEncoding(std::string Value);
};
class CodeGenInstruction {
public:
@ -242,45 +242,45 @@ namespace llvm {
/// MVT::Other.
MVT::SimpleValueType
HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const;
/// FlattenAsmStringVariants - Flatten the specified AsmString to only
/// include text from the specified variant, returning the new string.
static std::string FlattenAsmStringVariants(StringRef AsmString,
unsigned Variant);
};
/// CodeGenInstAlias - This represents an InstAlias definition.
class CodeGenInstAlias {
public:
Record *TheDef; // The actual record defining this InstAlias.
/// AsmString - The format string used to emit a .s file for the
/// instruction.
std::string AsmString;
/// Result - The result instruction.
DagInit *Result;
/// ResultInst - The instruction generated by the alias (decoded from
/// Result).
CodeGenInstruction *ResultInst;
struct ResultOperand {
private:
StringRef Name;
Record *R;
int64_t Imm;
public:
public:
enum {
K_Record,
K_Imm,
K_Reg
} Kind;
ResultOperand(StringRef N, Record *r) : Name(N), R(r), Kind(K_Record) {}
ResultOperand(int64_t I) : Imm(I), Kind(K_Imm) {}
ResultOperand(Record *r) : R(r), Kind(K_Reg) {}
@ -288,13 +288,13 @@ namespace llvm {
bool isRecord() const { return Kind == K_Record; }
bool isImm() const { return Kind == K_Imm; }
bool isReg() const { return Kind == K_Reg; }
StringRef getName() const { assert(isRecord()); return Name; }
Record *getRecord() const { assert(isRecord()); return R; }
int64_t getImm() const { assert(isImm()); return Imm; }
Record *getRegister() const { assert(isReg()); return R; }
};
/// ResultOperands - The decoded operands for the result instruction.
std::vector<ResultOperand> ResultOperands;
@ -304,13 +304,13 @@ namespace llvm {
/// index specifies the suboperand. If there are no suboperands or if all
/// of them are matched by the operand, the second value should be -1.
std::vector<std::pair<unsigned, int> > ResultInstOperandIndex;
CodeGenInstAlias(Record *R, CodeGenTarget &T);
bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
Record *InstOpRec, bool hasSubOps, SMLoc Loc,
CodeGenTarget &T, ResultOperand &ResOp);
};
};
}
#endif