6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-22 09:29:31 +00:00
Code Issues Projects Releases Wiki Activity

Add HLE target feature

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178082 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael Liao 2013-03-26 22:46:02 +00:00
parent 6b359ecd43
commit 0ca1a7f177
4 changed files with 14 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/X86/X86.td
View File

@ -120,6 +120,8 @@ def FeatureBMI2 : SubtargetFeature<"bmi2", "HasBMI2", "true",
"Support BMI2 instructions">;
def FeatureRTM : SubtargetFeature<"rtm", "HasRTM", "true",
"Support RTM instructions">;
def FeatureHLE : SubtargetFeature<"hle", "HasHLE", "true",
"Support HLE">;
def FeatureADX : SubtargetFeature<"adx", "HasADX", "true",
"Support ADX instructions">;
def FeaturePRFCHW : SubtargetFeature<"prfchw", "HasPRFCHW", "true",
@ -212,7 +214,8 @@ def : ProcessorModel<"core-avx2", SandyBridgeModel,
[FeatureAVX2, FeatureCMPXCHG16B, FeatureFastUAMem,
FeaturePOPCNT, FeatureAES, FeaturePCLMUL, FeatureRDRAND,
FeatureF16C, FeatureFSGSBase, FeatureMOVBE, FeatureLZCNT,
FeatureBMI, FeatureBMI2, FeatureFMA, FeatureRTM]>;
FeatureBMI, FeatureBMI2, FeatureFMA, FeatureRTM,
FeatureHLE]>;
def : Proc<"k6", [FeatureMMX]>;
def : Proc<"k6-2", [Feature3DNow]>;

1
lib/Target/X86/X86InstrInfo.td
View File

@ -603,6 +603,7 @@ def HasLZCNT : Predicate<"Subtarget->hasLZCNT()">;
def HasBMI : Predicate<"Subtarget->hasBMI()">;
def HasBMI2 : Predicate<"Subtarget->hasBMI2()">;
def HasRTM : Predicate<"Subtarget->hasRTM()">;
def HasHLE : Predicate<"Subtarget->hasHLE()">;
def HasADX : Predicate<"Subtarget->hasADX()">;
def HasPRFCHW : Predicate<"Subtarget->hasPRFCHW()">;
def HasPrefetchW : Predicate<"Subtarget->has3DNow() || Subtarget->hasPRFCHW()">;

5
lib/Target/X86/X86Subtarget.cpp
View File

@ -314,6 +314,10 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
HasBMI = true;
ToggleFeature(X86::FeatureBMI);
}
if ((EBX >> 4) & 0x1) {
HasHLE = true;
ToggleFeature(X86::FeatureHLE);
}
if (IsIntel && ((EBX >> 5) & 0x1)) {
X86SSELevel = AVX2;
ToggleFeature(X86::FeatureAVX2);
@ -443,6 +447,7 @@ void X86Subtarget::initializeEnvironment() {
HasBMI = false;
HasBMI2 = false;
HasRTM = false;
HasHLE = false;
HasADX = false;
HasPRFCHW = false;
IsBTMemSlow = false;

4
lib/Target/X86/X86Subtarget.h
View File

@ -121,6 +121,9 @@ protected:
/// HasRTM - Processor has RTM instructions.
bool HasRTM;
/// HasHLE - Processor has HLE.
bool HasHLE;
/// HasADX - Processor has ADX instructions.
bool HasADX;
@ -256,6 +259,7 @@ public:
bool hasBMI() const { return HasBMI; }
bool hasBMI2() const { return HasBMI2; }
bool hasRTM() const { return HasRTM; }
bool hasHLE() const { return HasHLE; }
bool hasADX() const { return HasADX; }
bool hasPRFCHW() const { return HasPRFCHW; }
bool isBTMemSlow() const { return IsBTMemSlow; }