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Expand i32/i64 CopyToReg f32/f64 to BIT_CONVERT + CopyToReg.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32493 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-12-12 21:21:32 +00:00
parent c35010d3a4
commit 0ca67332fa
1 changed files with 3 additions and 0 deletions
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lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -3942,6 +3942,9 @@ SDOperand SelectionDAGLowering::CopyValueToVirtualRegister(Value *V,
else else
Op = DAG.getNode(ISD::ANY_EXTEND, DestVT, Op); Op = DAG.getNode(ISD::ANY_EXTEND, DestVT, Op);
return DAG.getCopyToReg(getRoot(), Reg, Op); return DAG.getCopyToReg(getRoot(), Reg, Op);
} else if (SrcVT == MVT::f32 || SrcVT == MVT::f64) {
return DAG.getCopyToReg(getRoot(), Reg,
DAG.getNode(ISD::BIT_CONVERT, DestVT, Op));
} else { } else {
// The src value is expanded into multiple registers. // The src value is expanded into multiple registers.
SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DestVT, SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DestVT,