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Honor cpu directive, take two.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32492 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey 2006-12-12 20:57:08 +00:00
parent dbe4006cf3
commit c35010d3a4
3 changed files with 81 additions and 34 deletions
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56
lib/Target/PowerPC/PPC.td
View File

@ -19,6 +19,21 @@ include "../Target.td"
// PowerPC Subtarget features.
//
//===----------------------------------------------------------------------===//
// CPU Directives //
//===----------------------------------------------------------------------===//
def Directive601 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_601", "">;
def Directive602 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_602", "">;
def Directive603 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
def Directive604 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
def Directive620 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_603", "">;
def Directive7400: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_7400", "">;
def Directive750 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_750", "">;
def Directive970 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_970", "">;
def Directive32 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_32", "">;
def Directive64 : SubtargetFeature<"", "DarwinDirective", "PPC::DIR_64", "">;
def Feature64Bit : SubtargetFeature<"64bit","Has64BitSupport", "true",
"Enable 64-bit instructions">;
def Feature64BitRegs : SubtargetFeature<"64bitregs","Use64BitRegs", "true",
@ -44,26 +59,33 @@ include "PPCInstrInfo.td"
// PowerPC processors supported.
//
def : Processor<"generic", G3Itineraries, []>;
def : Processor<"601", G3Itineraries, []>;
def : Processor<"602", G3Itineraries, []>;
def : Processor<"603", G3Itineraries, []>;
def : Processor<"603e", G3Itineraries, []>;
def : Processor<"603ev", G3Itineraries, []>;
def : Processor<"604", G3Itineraries, []>;
def : Processor<"604e", G3Itineraries, []>;
def : Processor<"620", G3Itineraries, []>;
def : Processor<"g3", G3Itineraries, []>;
def : Processor<"7400", G4Itineraries, [FeatureAltivec]>;
def : Processor<"g4", G4Itineraries, [FeatureAltivec]>;
def : Processor<"7450", G4PlusItineraries, [FeatureAltivec]>;
def : Processor<"g4+", G4PlusItineraries, [FeatureAltivec]>;
def : Processor<"750", G3Itineraries, []>;
def : Processor<"generic", G3Itineraries, [Directive32]>;
def : Processor<"601", G3Itineraries, [Directive601]>;
def : Processor<"602", G3Itineraries, [Directive602]>;
def : Processor<"603", G3Itineraries, [Directive603]>;
def : Processor<"603e", G3Itineraries, [Directive603]>;
def : Processor<"603ev", G3Itineraries, [Directive603]>;
def : Processor<"604", G3Itineraries, [Directive604]>;
def : Processor<"604e", G3Itineraries, [Directive604]>;
def : Processor<"620", G3Itineraries, [Directive620]>;
def : Processor<"g3", G3Itineraries, [Directive7400]>;
def : Processor<"7400", G4Itineraries, [Directive7400, FeatureAltivec]>;
def : Processor<"g4", G4Itineraries, [Directive7400, FeatureAltivec]>;
def : Processor<"7450", G4PlusItineraries, [Directive7400, FeatureAltivec]>;
def : Processor<"g4+", G4PlusItineraries, [Directive750, FeatureAltivec]>;
def : Processor<"750", G4Itineraries, [Directive750, FeatureAltivec]>;
def : Processor<"970", G5Itineraries,
[FeatureAltivec, FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
[Directive970, FeatureAltivec,
FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
Feature64Bit /*, Feature64BitRegs */]>;
def : Processor<"g5", G5Itineraries,
[FeatureAltivec, FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
[Directive970, FeatureAltivec,
FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
Feature64Bit /*, Feature64BitRegs */]>;
def : Processor<"ppc", G3Itineraries, [Directive32]>;
def : Processor<"ppc64", G5Itineraries,
[Directive64, FeatureAltivec,
FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
Feature64Bit /*, Feature64BitRegs */]>;

37
lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -542,23 +542,26 @@ bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
bool DarwinAsmPrinter::doInitialization(Module &M) {
#if 1
if (Subtarget.isGigaProcessor())
O << "\t.machine ppc970\n";
#else
const std::string &CPU = Subtarget.getCPU();
if (CPU != "generic")
O << "\t.machine ppc" << CPU << "\n";
else if (Subtarget.isGigaProcessor())
O << "\t.machine ppc970\n";
else if (Subtarget.isPPC64())
O << "\t.machine ppc64\n";
else if (Subtarget.hasAltivec())
O << "\t.machine ppc7400\n";
else
O << "\t.machine ppc\n";
#endif
static const char *CPUDirectives[] = {
"ppc",
"ppc601",
"ppc602",
"ppc603",
"ppc7400",
"ppc750",
"ppc970",
"ppc64"
};
unsigned Directive = Subtarget.getDarwinDirective();
if (Subtarget.isGigaProcessor() && Directive < PPC::DIR_970)
Directive = PPC::DIR_970;
if (Subtarget.hasAltivec() && Directive < PPC::DIR_7400)
Directive = PPC::DIR_7400;
if (Subtarget.isPPC64() && Directive < PPC::DIR_970)
Directive = PPC::DIR_64;
assert(Directive <= PPC::DIR_64 && "Directive out of range.");
O << "\t.machine " << CPUDirectives[Directive] << "\n";
AsmPrinter::doInitialization(M);

22
lib/Target/PowerPC/PPCSubtarget.h
View File

@ -20,6 +20,21 @@
#include <string>
namespace llvm {
namespace PPC {
// -m directive values.
enum {
DIR_32,
DIR_601,
DIR_602,
DIR_603,
DIR_7400,
DIR_750,
DIR_970,
DIR_64
};
}
class Module;
class GlobalValue;
class TargetMachine;
@ -34,6 +49,9 @@ protected:
/// Selected instruction itineraries (one entry per itinerary class.)
InstrItineraryData InstrItins;
/// Which cpu directive was used.
unsigned DarwinDirective;
/// Used by the ISel to turn in optimizations for POWER4-derived architectures
bool IsGigaProcessor;
@ -65,6 +83,10 @@ public:
/// function for this subtarget.
unsigned getStackAlignment() const { return StackAlignment; }
/// getDarwinDirective - Returns the -m directive specified for the cpu.
///
unsigned getDarwinDirective() const { return DarwinDirective; }
/// getInstrItins - Return the instruction itineraies based on subtarget
/// selection.
const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }