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[mips][FastISel] Implement intrinsics memset, memcopy & memmove.
Summary: Implement the intrinsics memset, memcopy and memmove in MIPS FastISel. Make some needed infrastructure fixes so that this can work. Based on a patch by Reed Kotler. Test Plan: memtest1.ll The patch passes test-suite for mips32 r1/r2 and at O0/O2 Reviewers: rkotler, dsanders Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7158 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238759 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -82,6 +82,7 @@ class MipsFastISel final : public FastISel {
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LLVMContext *Context;
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bool fastLowerCall(CallLoweringInfo &CLI) override;
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bool fastLowerIntrinsicCall(const IntrinsicInst *II) override;
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bool TargetSupported;
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bool UnsupportedFPMode; // To allow fast-isel to proceed and just not handle
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@ -142,6 +143,7 @@ private:
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unsigned materializeGV(const GlobalValue *GV, MVT VT);
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unsigned materializeInt(const Constant *C, MVT VT);
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unsigned materialize32BitInt(int64_t Imm, const TargetRegisterClass *RC);
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unsigned materializeExternalCallSym(const char *SynName);
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MachineInstrBuilder emitInst(unsigned Opc) {
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return BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc));
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@ -367,6 +369,15 @@ unsigned MipsFastISel::materializeGV(const GlobalValue *GV, MVT VT) {
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return DestReg;
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}
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unsigned MipsFastISel::materializeExternalCallSym(const char *SymName) {
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const TargetRegisterClass *RC = &Mips::GPR32RegClass;
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unsigned DestReg = createResultReg(RC);
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emitInst(Mips::LW, DestReg)
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.addReg(MFI->getGlobalBaseReg())
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.addExternalSymbol(SymName, MipsII::MO_GOT);
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return DestReg;
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}
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// Materialize a constant into a register, and return the register
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// number (or zero if we failed to handle it).
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unsigned MipsFastISel::fastMaterializeConstant(const Constant *C) {
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@ -471,15 +482,51 @@ bool MipsFastISel::computeAddress(const Value *Obj, Address &Addr) {
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}
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bool MipsFastISel::computeCallAddress(const Value *V, Address &Addr) {
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const GlobalValue *GV = dyn_cast<GlobalValue>(V);
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if (GV && isa<Function>(GV) && cast<Function>(GV)->isIntrinsic())
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return false;
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if (!GV)
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return false;
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const User *U = nullptr;
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unsigned Opcode = Instruction::UserOp1;
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if (const auto *I = dyn_cast<Instruction>(V)) {
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// Check if the value is defined in the same basic block. This information
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// is crucial to know whether or not folding an operand is valid.
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if (I->getParent() == FuncInfo.MBB->getBasicBlock()) {
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Opcode = I->getOpcode();
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U = I;
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}
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} else if (const auto *C = dyn_cast<ConstantExpr>(V)) {
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Opcode = C->getOpcode();
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U = C;
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}
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switch (Opcode) {
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default:
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break;
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case Instruction::BitCast:
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// Look past bitcasts if its operand is in the same BB.
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return computeCallAddress(U->getOperand(0), Addr);
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break;
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case Instruction::IntToPtr:
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// Look past no-op inttoptrs if its operand is in the same BB.
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if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
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return computeCallAddress(U->getOperand(0), Addr);
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break;
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case Instruction::PtrToInt:
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// Look past no-op ptrtoints if its operand is in the same BB.
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if (TLI.getValueType(U->getType()) == TLI.getPointerTy())
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return computeCallAddress(U->getOperand(0), Addr);
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break;
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}
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if (const GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
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Addr.setGlobalValue(GV);
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return true;
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}
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// If all else fails, try to materialize the value in a register.
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if (!Addr.getGlobalValue()) {
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Addr.setReg(getRegForValue(V));
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return Addr.getReg() != 0;
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}
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return false;
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}
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@ -1187,7 +1234,7 @@ bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) {
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bool IsTailCall = CLI.IsTailCall;
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bool IsVarArg = CLI.IsVarArg;
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const Value *Callee = CLI.Callee;
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// const char *SymName = CLI.SymName;
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const char *SymName = CLI.SymName;
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// Allow SelectionDAG isel to handle tail calls.
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if (IsTailCall)
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@ -1234,8 +1281,15 @@ bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) {
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if (!processCallArgs(CLI, OutVTs, NumBytes))
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return false;
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if (!Addr.getGlobalValue())
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return false;
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// Issue the call.
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unsigned DestAddress = materializeGV(Addr.getGlobalValue(), MVT::i32);
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unsigned DestAddress;
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if (SymName)
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DestAddress = materializeExternalCallSym(SymName);
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else
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DestAddress = materializeGV(Addr.getGlobalValue(), MVT::i32);
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emitInst(TargetOpcode::COPY, Mips::T9).addReg(DestAddress);
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MachineInstrBuilder MIB =
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::JALR),
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@ -1255,6 +1309,34 @@ bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) {
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return finishCall(CLI, RetVT, NumBytes);
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}
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bool MipsFastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
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switch (II->getIntrinsicID()) {
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default:
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return false;
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case Intrinsic::memcpy:
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case Intrinsic::memmove: {
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const auto *MTI = cast<MemTransferInst>(II);
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// Don't handle volatile.
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if (MTI->isVolatile())
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return false;
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if (!MTI->getLength()->getType()->isIntegerTy(32))
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return false;
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const char *IntrMemName = isa<MemCpyInst>(II) ? "memcpy" : "memmove";
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return lowerCallTo(II, IntrMemName, II->getNumArgOperands() - 2);
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}
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case Intrinsic::memset: {
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const MemSetInst *MSI = cast<MemSetInst>(II);
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// Don't handle volatile.
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if (MSI->isVolatile())
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return false;
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if (!MSI->getLength()->getType()->isIntegerTy(32))
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return false;
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return lowerCallTo(II, "memset", II->getNumArgOperands() - 2);
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}
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}
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return false;
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}
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bool MipsFastISel::selectRet(const Instruction *I) {
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const Function &F = *I->getParent()->getParent();
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const ReturnInst *Ret = cast<ReturnInst>(I);
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test/CodeGen/Mips/Fast-ISel/memtest1.ll
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74
test/CodeGen/Mips/Fast-ISel/memtest1.ll
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@ -0,0 +1,74 @@
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; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
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; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \
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; RUN: -check-prefix=ALL -check-prefix=32R1
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; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
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; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \
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; RUN: -check-prefix=ALL -check-prefix=32R2
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@str = private unnamed_addr constant [12 x i8] c"hello there\00", align 1
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@src = global i8* getelementptr inbounds ([12 x i8], [12 x i8]* @str, i32 0, i32 0), align 4
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@i = global i32 12, align 4
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@dest = common global [50 x i8] zeroinitializer, align 1
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
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declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1)
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define void @cpy(i8* %src, i32 %i) {
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; ALL-LABEL: cpy:
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; ALL-DAG: lw $[[T0:[0-9]+]], %got(dest)(${{[0-9]+}})
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; ALL-DAG: sw $4, 24($sp)
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; ALL-DAG: move $4, $[[T0]]
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; ALL-DAG: sw $5, 20($sp)
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; ALL-DAG: lw $[[T1:[0-9]+]], 24($sp)
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; ALL-DAG: move $5, $[[T1]]
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; ALL-DAG: lw $6, 20($sp)
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; ALL-DAG: lw $[[T2:[0-9]+]], %got(memcpy)(${{[0-9]+}})
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; ALL: jalr $[[T2]]
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; ALL-NEXT: nop
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; ALL-NOT: {{.*}}$2{{.*}}
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @dest, i32 0, i32 0),
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i8* %src, i32 %i, i32 1, i1 false)
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ret void
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}
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define void @mov(i8* %src, i32 %i) {
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; ALL-LABEL: mov:
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; ALL-DAG: lw $[[T0:[0-9]+]], %got(dest)(${{[0-9]+}})
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; ALL-DAG: sw $4, 24($sp)
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; ALL-DAG: move $4, $[[T0]]
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; ALL-DAG: sw $5, 20($sp)
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; ALL-DAG: lw $[[T1:[0-9]+]], 24($sp)
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; ALL-DAG: move $5, $[[T1]]
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; ALL-DAG: lw $6, 20($sp)
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; ALL-DAG: lw $[[T2:[0-9]+]], %got(memmove)(${{[0-9]+}})
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; ALL: jalr $[[T2]]
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; ALL-NEXT: nop
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; ALL-NOT: {{.*}}$2{{.*}}
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call void @llvm.memmove.p0i8.p0i8.i32(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @dest, i32 0, i32 0),
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i8* %src, i32 %i, i32 1, i1 false)
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ret void
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}
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define void @clear(i32 %i) {
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; ALL-LABEL: clear:
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; ALL-DAG: lw $[[T0:[0-9]+]], %got(dest)(${{[0-9]+}})
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; ALL-DAG: sw $4, 16($sp)
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; ALL-DAG: move $4, $[[T0]]
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; ALL-DAG: addiu $[[T1:[0-9]+]], $zero, 42
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; 32R1-DAG: sll $[[T2:[0-9]+]], $[[T1]], 24
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; 32R1-DAG: sra $5, $[[T2]], 24
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; 32R2-DAG: seb $5, $[[T1]]
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; ALL-DAG: lw $6, 16($sp)
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; ALL-DAG: lw $[[T2:[0-9]+]], %got(memset)(${{[0-9]+}})
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; ALL: jalr $[[T2]]
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; ALL-NEXT: nop
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; ALL-NOT: {{.*}}$2{{.*}}
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call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @dest, i32 0, i32 0),
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i8 42, i32 %i, i32 1, i1 false)
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ret void
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}
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