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ptx: add basic intrinsic support

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127084 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Che-Liang Chiou 2011-03-05 14:17:37 +00:00
parent afc7d235e9
commit 0df2c50c2b
6 changed files with 117 additions and 2 deletions
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1
include/llvm/Intrinsics.td
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@ -490,3 +490,4 @@ include "llvm/IntrinsicsARM.td"
include "llvm/IntrinsicsCellSPU.td"
include "llvm/IntrinsicsAlpha.td"
include "llvm/IntrinsicsXCore.td"
include "llvm/IntrinsicsPTX.td"

4
include/llvm/IntrinsicsARM.td
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@ -1,10 +1,10 @@
//===- IntrinsicsARM.td - Defines ARM intrinsics -----------*- tablegen -*-===//
//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//
//===----------------------------------------------------------------------===//
//
// This file defines all of the ARM-specific intrinsics.

32
include/llvm/IntrinsicsPTX.td Normal file
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@ -0,0 +1,32 @@
//===- IntrinsicsPTX.td - Defines PTX intrinsics -----------*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines all of the PTX-specific intrinsics.
//
//===----------------------------------------------------------------------===//
let TargetPrefix = "ptx" in {
multiclass PTXReadSpecialRegisterIntrinsic {
def _r64 : Intrinsic<[llvm_i64_ty], [], [IntrNoMem]>;
def _v4i16 : Intrinsic<[llvm_v4i16_ty], [], [IntrNoMem]>;
}
multiclass PTXReadSpecialSubRegisterIntrinsic {
def _x : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
def _y : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
def _z : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
def _w : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
}
}
defm int_ptx_read_tid : PTXReadSpecialRegisterIntrinsic;
defm int_ptx_read_tid : PTXReadSpecialSubRegisterIntrinsic;
let TargetPrefix = "ptx" in
def int_ptx_bar_sync : Intrinsic<[], [llvm_i32_ty], []>;

4
lib/Target/PTX/PTXInstrInfo.td
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@ -390,3 +390,7 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
def EXIT : InstPTX<(outs), (ins), "exit", [(PTXexit)]>;
def RET : InstPTX<(outs), (ins), "ret", [(PTXret)]>;
}
///===- Intrinsic Instructions --------------------------------------------===//
include "PTXIntrinsicInstrInfo.td"

35
lib/Target/PTX/PTXIntrinsicInstrInfo.td Normal file
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@ -0,0 +1,35 @@
//===- PTXIntrinsicInstrInfo.td - Defines PTX intrinsics ---*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines all of the PTX-specific intrinsic instructions.
//
//===----------------------------------------------------------------------===//
// PTX Special Purpose Register Accessor Intrinsics
class PTX_READ_SPECIAL_REGISTER<string regname, Intrinsic intop>
: InstPTX<(outs RRegu64:$d), (ins),
!strconcat("mov.u64\t$d, ", regname),
[(set RRegu64:$d, (intop))]>;
class PTX_READ_SPECIAL_SUB_REGISTER<string regname, Intrinsic intop>
: InstPTX<(outs RRegu16:$d), (ins),
!strconcat("mov.u16\t$d, ", regname),
[(set RRegu16:$d, (intop))]>;
def PTX_READ_TID_R64 : PTX_READ_SPECIAL_REGISTER<"tid", int_ptx_read_tid_r64>;
def PTX_READ_TID_X : PTX_READ_SPECIAL_SUB_REGISTER<"tid.x", int_ptx_read_tid_x>;
def PTX_READ_TID_Y : PTX_READ_SPECIAL_SUB_REGISTER<"tid.y", int_ptx_read_tid_y>;
def PTX_READ_TID_Z : PTX_READ_SPECIAL_SUB_REGISTER<"tid.z", int_ptx_read_tid_z>;
def PTX_READ_TID_W : PTX_READ_SPECIAL_SUB_REGISTER<"tid.w", int_ptx_read_tid_w>;
// PTX Parallel Synchronization and Communication Intrinsics
def PTX_BAR_SYNC : InstPTX<(outs), (ins i32imm:$i), "bar.sync\t$i",
[(int_ptx_bar_sync imm:$i)]>;

43
test/CodeGen/PTX/intrinsic.ll Normal file
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@ -0,0 +1,43 @@
; RUN: llc < %s -march=ptx | FileCheck %s
define ptx_device i16 @tid_x() {
; CHECK: mov.u16 rh0, tid.x;
; CHECK-NEXT: ret;
%x = call i16 @llvm.ptx.read.tid.x()
ret i16 %x
}
define ptx_device i16 @tid_y() {
; CHECK: mov.u16 rh0, tid.y;
; CHECK-NEXT: ret;
%x = call i16 @llvm.ptx.read.tid.y()
ret i16 %x
}
define ptx_device i16 @tid_z() {
; CHECK: mov.u16 rh0, tid.z;
; CHECK-NEXT: ret;
%x = call i16 @llvm.ptx.read.tid.z()
ret i16 %x
}
define ptx_device i16 @tid_w() {
; CHECK: mov.u16 rh0, tid.w;
; CHECK-NEXT: ret;
%x = call i16 @llvm.ptx.read.tid.w()
ret i16 %x
}
define ptx_device void @bar_sync() {
; CHECK: bar.sync 0
; CHECK-NEXT: ret;
call void @llvm.ptx.bar.sync(i32 0)
ret void
}
declare i16 @llvm.ptx.read.tid.x()
declare i16 @llvm.ptx.read.tid.y()
declare i16 @llvm.ptx.read.tid.z()
declare i16 @llvm.ptx.read.tid.w()
declare void @llvm.ptx.bar.sync(i32 %i)