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Match X86 register names to number.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77404 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar
2009-07-29 00:02:19 +00:00
parent 55e459aa75
commit 0e2771f4c4
6 changed files with 72 additions and 12 deletions
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utils/TableGen/CodeGenTarget.cpp
+13
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@@ -22,6 +22,10 @@
#include <algorithm>
using namespace llvm;
static cl::opt<unsigned>
AsmParserNum("asmparsernum", cl::init(0),
cl::desc("Make -gen-asm-parser emit assembly parser #N"));
static cl::opt<unsigned>
AsmWriterNum("asmwriternum", cl::init(0),
cl::desc("Make -gen-asm-writer emit assembly writer #N"));
@@ -133,6 +137,15 @@ Record *CodeGenTarget::getInstructionSet() const {
return TargetRec->getValueAsDef("InstructionSet");
}
/// getAsmParser - Return the AssemblyParser definition for this target.
///
Record *CodeGenTarget::getAsmParser() const {
std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
if (AsmParserNum >= LI.size())
throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
return LI[AsmParserNum];
}
/// getAsmWriter - Return the AssemblyWriter definition for this target.
///
Record *CodeGenTarget::getAsmWriter() const {