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Hexagon: Disable optimizations at O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178132 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -35,6 +35,10 @@ opt<bool> DisableHexagonMISched("disable-hexagon-misched",
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cl::Hidden, cl::ZeroOrMore, cl::init(false),
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cl::desc("Disable Hexagon MI Scheduling"));
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static cl::opt<bool> DisableHexagonCFGOpt("disable-hexagon-cfgopt",
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cl::Hidden, cl::ZeroOrMore, cl::init(false),
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cl::desc("Disable Hexagon CFG Optimization"));
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/// HexagonTargetMachineModule - Note that this is used on hosts that
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/// cannot link in a library unless there are references into the
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/// library. In particular, it seems that it is not possible to get
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@ -75,19 +79,20 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, StringRef TT,
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TSInfo(*this),
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FrameLowering(Subtarget),
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InstrItins(&Subtarget.getInstrItineraryData()) {
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setMCUseCFI(false);
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setMCUseCFI(false);
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}
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// addPassesForOptimizations - Allow the backend (target) to add Target
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// Independent Optimization passes to the Pass Manager.
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bool HexagonTargetMachine::addPassesForOptimizations(PassManagerBase &PM) {
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PM.add(createConstantPropagationPass());
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PM.add(createLoopSimplifyPass());
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PM.add(createDeadCodeEliminationPass());
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PM.add(createConstantPropagationPass());
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PM.add(createLoopUnrollPass());
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PM.add(createLoopStrengthReducePass());
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if (getOptLevel() != CodeGenOpt::None) {
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PM.add(createConstantPropagationPass());
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PM.add(createLoopSimplifyPass());
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PM.add(createDeadCodeEliminationPass());
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PM.add(createConstantPropagationPass());
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PM.add(createLoopUnrollPass());
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PM.add(createLoopStrengthReducePass());
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}
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return true;
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}
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@ -121,38 +126,45 @@ TargetPassConfig *HexagonTargetMachine::createPassConfig(PassManagerBase &PM) {
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}
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bool HexagonPassConfig::addInstSelector() {
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addPass(createHexagonRemoveExtendOps(getHexagonTargetMachine()));
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createHexagonRemoveExtendOps(getHexagonTargetMachine()));
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addPass(createHexagonISelDag(getHexagonTargetMachine(), getOptLevel()));
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addPass(createHexagonPeephole());
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createHexagonPeephole());
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return false;
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}
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bool HexagonPassConfig::addPreRegAlloc() {
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if (!DisableHardwareLoops) {
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if (!DisableHardwareLoops && getOptLevel() != CodeGenOpt::None)
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addPass(createHexagonHardwareLoops());
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}
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return false;
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}
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bool HexagonPassConfig::addPostRegAlloc() {
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addPass(createHexagonCFGOptimizer(getHexagonTargetMachine()));
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if (!DisableHexagonCFGOpt && getOptLevel() != CodeGenOpt::None)
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addPass(createHexagonCFGOptimizer(getHexagonTargetMachine()));
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return true;
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}
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bool HexagonPassConfig::addPreSched2() {
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addPass(&IfConverterID);
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if (getOptLevel() != CodeGenOpt::None)
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addPass(&IfConverterID);
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return true;
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}
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bool HexagonPassConfig::addPreEmitPass() {
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if (!DisableHardwareLoops) {
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if (!DisableHardwareLoops && getOptLevel() != CodeGenOpt::None)
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addPass(createHexagonFixupHwLoops());
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}
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addPass(createHexagonNewValueJump());
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createHexagonNewValueJump());
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// Expand Spill code for predicate registers.
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addPass(createHexagonExpandPredSpillCode(getHexagonTargetMachine()));
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@ -161,7 +173,8 @@ bool HexagonPassConfig::addPreEmitPass() {
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addPass(createHexagonSplitTFRCondSets(getHexagonTargetMachine()));
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// Create Packets.
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addPass(createHexagonPacketizer());
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createHexagonPacketizer());
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return false;
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}
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