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Remove tailing whitespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167445 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1302,7 +1302,7 @@ let Predicates = [HasAVX] in {
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(VMOVHPSrm VR128:$src1, addr:$src2)>;
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// FIXME: Instead of X86Unpckl, there should be a X86Movlhpd here, the problem
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// is during lowering, where it's not possible to recognize the load fold
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// is during lowering, where it's not possible to recognize the load fold
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// cause it has two uses through a bitcast. One use disappears at isel time
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// and the fold opportunity reappears.
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def : Pat<(v2f64 (X86Unpckl VR128:$src1,
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@ -1322,7 +1322,7 @@ let Predicates = [UseSSE1] in {
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let Predicates = [UseSSE2] in {
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// FIXME: Instead of X86Unpckl, there should be a X86Movlhpd here, the problem
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// is during lowering, where it's not possible to recognize the load fold
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// is during lowering, where it's not possible to recognize the load fold
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// cause it has two uses through a bitcast. One use disappears at isel time
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// and the fold opportunity reappears.
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def : Pat<(v2f64 (X86Unpckl VR128:$src1,
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@ -2159,7 +2159,7 @@ let Predicates = [UseSSE2] in {
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// sse12_cmp_scalar - sse 1 & 2 compare scalar instructions
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multiclass sse12_cmp_scalar<RegisterClass RC, X86MemOperand x86memop,
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Operand CC, SDNode OpNode, ValueType VT,
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Operand CC, SDNode OpNode, ValueType VT,
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PatFrag ld_frag, string asm, string asm_alt,
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OpndItins itins> {
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def rr : SIi8<0xC2, MRMSrcReg,
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@ -2305,7 +2305,7 @@ let Defs = [EFLAGS] in {
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// sse12_cmp_packed - sse 1 & 2 compare packed instructions
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multiclass sse12_cmp_packed<RegisterClass RC, X86MemOperand x86memop,
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Operand CC, Intrinsic Int, string asm,
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Operand CC, Intrinsic Int, string asm,
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string asm_alt, Domain d> {
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def rri : PIi8<0xC2, MRMSrcReg,
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(outs RC:$dst), (ins RC:$src1, RC:$src2, CC:$cc), asm,
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