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https://github.com/c64scene-ar/llvm-6502.git
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Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
type down. This is not currently used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55345 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -64,6 +64,7 @@ protected:
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/// to request that an instruction with the given type and opcode
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/// to request that an instruction with the given type and opcode
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/// be emitted.
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/// be emitted.
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virtual unsigned FastEmit_(MVT::SimpleValueType VT,
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virtual unsigned FastEmit_(MVT::SimpleValueType VT,
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MVT::SimpleValueType RetVT,
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ISD::NodeType Opcode);
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ISD::NodeType Opcode);
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/// FastEmit_r - This method is called by target-independent code
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/// FastEmit_r - This method is called by target-independent code
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@ -71,6 +72,7 @@ protected:
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/// register operand be emitted.
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/// register operand be emitted.
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///
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///
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virtual unsigned FastEmit_r(MVT::SimpleValueType VT,
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virtual unsigned FastEmit_r(MVT::SimpleValueType VT,
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MVT::SimpleValueType RetVT,
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ISD::NodeType Opcode, unsigned Op0);
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ISD::NodeType Opcode, unsigned Op0);
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/// FastEmit_rr - This method is called by target-independent code
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/// FastEmit_rr - This method is called by target-independent code
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@ -78,6 +80,7 @@ protected:
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/// register operands be emitted.
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/// register operands be emitted.
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///
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///
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virtual unsigned FastEmit_rr(MVT::SimpleValueType VT,
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virtual unsigned FastEmit_rr(MVT::SimpleValueType VT,
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MVT::SimpleValueType RetVT,
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ISD::NodeType Opcode,
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ISD::NodeType Opcode,
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unsigned Op0, unsigned Op1);
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unsigned Op0, unsigned Op1);
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@ -86,6 +89,7 @@ protected:
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/// register and immediate operands be emitted.
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/// register and immediate operands be emitted.
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///
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///
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virtual unsigned FastEmit_ri(MVT::SimpleValueType VT,
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virtual unsigned FastEmit_ri(MVT::SimpleValueType VT,
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MVT::SimpleValueType RetVT,
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ISD::NodeType Opcode,
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ISD::NodeType Opcode,
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unsigned Op0, uint64_t Imm);
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unsigned Op0, uint64_t Imm);
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@ -94,6 +98,7 @@ protected:
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/// register and immediate operands be emitted.
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/// register and immediate operands be emitted.
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///
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///
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virtual unsigned FastEmit_rri(MVT::SimpleValueType VT,
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virtual unsigned FastEmit_rri(MVT::SimpleValueType VT,
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MVT::SimpleValueType RetVT,
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ISD::NodeType Opcode,
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ISD::NodeType Opcode,
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unsigned Op0, unsigned Op1, uint64_t Imm);
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unsigned Op0, unsigned Op1, uint64_t Imm);
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@ -110,6 +115,7 @@ protected:
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/// to request that an instruction with the given type, opcode, and
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/// to request that an instruction with the given type, opcode, and
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/// immediate operand be emitted.
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/// immediate operand be emitted.
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virtual unsigned FastEmit_i(MVT::SimpleValueType VT,
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virtual unsigned FastEmit_i(MVT::SimpleValueType VT,
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MVT::SimpleValueType RetVT,
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ISD::NodeType Opcode,
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ISD::NodeType Opcode,
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uint64_t Imm);
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uint64_t Imm);
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@ -55,7 +55,8 @@ bool FastISel::SelectBinaryOp(Instruction *I, ISD::NodeType ISDOpcode,
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// Unhandled operand. Halt "fast" selection and bail.
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// Unhandled operand. Halt "fast" selection and bail.
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return false;
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return false;
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unsigned ResultReg = FastEmit_rr(VT.getSimpleVT(), ISDOpcode, Op0, Op1);
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unsigned ResultReg = FastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(),
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ISDOpcode, Op0, Op1);
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if (ResultReg == 0)
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if (ResultReg == 0)
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// Target-specific code wasn't able to find a machine opcode for
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// Target-specific code wasn't able to find a machine opcode for
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// the given ISD opcode and type. Halt "fast" selection and bail.
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// the given ISD opcode and type. Halt "fast" selection and bail.
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@ -117,9 +118,9 @@ bool FastISel::SelectGetElementPtr(Instruction *I,
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// it.
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// it.
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MVT IdxVT = MVT::getMVT(Idx->getType(), /*HandleUnknown=*/false);
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MVT IdxVT = MVT::getMVT(Idx->getType(), /*HandleUnknown=*/false);
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if (IdxVT.bitsLT(VT))
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if (IdxVT.bitsLT(VT))
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IdxN = FastEmit_r(VT, ISD::SIGN_EXTEND, IdxN);
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IdxN = FastEmit_r(VT, VT, ISD::SIGN_EXTEND, IdxN);
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else if (IdxVT.bitsGT(VT))
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else if (IdxVT.bitsGT(VT))
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IdxN = FastEmit_r(VT, ISD::TRUNCATE, IdxN);
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IdxN = FastEmit_r(VT, VT, ISD::TRUNCATE, IdxN);
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if (IdxN == 0)
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if (IdxN == 0)
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// Unhandled operand. Halt "fast" selection and bail.
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// Unhandled operand. Halt "fast" selection and bail.
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return false;
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return false;
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@ -129,7 +130,7 @@ bool FastISel::SelectGetElementPtr(Instruction *I,
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if (IdxN == 0)
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if (IdxN == 0)
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// Unhandled operand. Halt "fast" selection and bail.
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// Unhandled operand. Halt "fast" selection and bail.
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return false;
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return false;
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N = FastEmit_rr(VT, ISD::ADD, N, IdxN);
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N = FastEmit_rr(VT, VT, ISD::ADD, N, IdxN);
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if (N == 0)
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if (N == 0)
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// Unhandled operand. Halt "fast" selection and bail.
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// Unhandled operand. Halt "fast" selection and bail.
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return false;
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return false;
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@ -228,7 +229,8 @@ FastISel::SelectInstructions(BasicBlock::iterator Begin,
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if (ConstantInt* CI = dyn_cast<ConstantInt>(I->getOperand(0))) {
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if (ConstantInt* CI = dyn_cast<ConstantInt>(I->getOperand(0))) {
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if (I->getType()->isInteger()) {
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if (I->getType()->isInteger()) {
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MVT VT = MVT::getMVT(I->getType(), /*HandleUnknown=*/false);
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MVT VT = MVT::getMVT(I->getType(), /*HandleUnknown=*/false);
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ValueMap[I] = FastEmit_i(VT.getSimpleVT(), ISD::Constant,
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ValueMap[I] = FastEmit_i(VT.getSimpleVT(), VT.getSimpleVT(),
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ISD::Constant,
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CI->getZExtValue());
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CI->getZExtValue());
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break;
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break;
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} else
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} else
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@ -286,31 +288,34 @@ FastISel::FastISel(MachineFunction &mf)
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FastISel::~FastISel() {}
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FastISel::~FastISel() {}
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unsigned FastISel::FastEmit_(MVT::SimpleValueType, ISD::NodeType) {
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unsigned FastISel::FastEmit_(MVT::SimpleValueType, MVT::SimpleValueType, ISD::NodeType) {
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return 0;
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return 0;
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}
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}
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unsigned FastISel::FastEmit_r(MVT::SimpleValueType, ISD::NodeType,
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unsigned FastISel::FastEmit_r(MVT::SimpleValueType, MVT::SimpleValueType,
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ISD::NodeType, unsigned /*Op0*/) {
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return 0;
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}
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unsigned FastISel::FastEmit_rr(MVT::SimpleValueType, MVT::SimpleValueType,
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ISD::NodeType, unsigned /*Op0*/,
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unsigned /*Op0*/) {
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unsigned /*Op0*/) {
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return 0;
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return 0;
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}
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}
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unsigned FastISel::FastEmit_rr(MVT::SimpleValueType, ISD::NodeType,
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unsigned FastISel::FastEmit_i(MVT::SimpleValueType, MVT::SimpleValueType,
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unsigned /*Op0*/, unsigned /*Op0*/) {
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ISD::NodeType, uint64_t /*Imm*/) {
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return 0;
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return 0;
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}
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}
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unsigned FastISel::FastEmit_i(MVT::SimpleValueType, ISD::NodeType,
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unsigned FastISel::FastEmit_ri(MVT::SimpleValueType, MVT::SimpleValueType,
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ISD::NodeType, unsigned /*Op0*/,
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uint64_t /*Imm*/) {
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uint64_t /*Imm*/) {
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return 0;
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return 0;
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}
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}
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unsigned FastISel::FastEmit_ri(MVT::SimpleValueType, ISD::NodeType,
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unsigned FastISel::FastEmit_rri(MVT::SimpleValueType, MVT::SimpleValueType,
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unsigned /*Op0*/, uint64_t /*Imm*/) {
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ISD::NodeType,
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return 0;
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}
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unsigned FastISel::FastEmit_rri(MVT::SimpleValueType, ISD::NodeType,
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unsigned /*Op0*/, unsigned /*Op1*/,
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unsigned /*Op0*/, unsigned /*Op1*/,
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uint64_t /*Imm*/) {
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uint64_t /*Imm*/) {
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return 0;
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return 0;
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@ -326,13 +331,13 @@ unsigned FastISel::FastEmit_ri_(MVT::SimpleValueType VT, ISD::NodeType Opcode,
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unsigned ResultReg = 0;
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unsigned ResultReg = 0;
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// First check if immediate type is legal. If not, we can't use the ri form.
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// First check if immediate type is legal. If not, we can't use the ri form.
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if (TLI.getOperationAction(ISD::Constant, ImmType) == TargetLowering::Legal)
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if (TLI.getOperationAction(ISD::Constant, ImmType) == TargetLowering::Legal)
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ResultReg = FastEmit_ri(VT, Opcode, Op0, Imm);
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ResultReg = FastEmit_ri(VT, VT, Opcode, Op0, Imm);
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if (ResultReg != 0)
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if (ResultReg != 0)
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return ResultReg;
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return ResultReg;
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unsigned MaterialReg = FastEmit_i(ImmType, ISD::Constant, Imm);
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unsigned MaterialReg = FastEmit_i(ImmType, ImmType, ISD::Constant, Imm);
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if (MaterialReg == 0)
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if (MaterialReg == 0)
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return 0;
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return 0;
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return FastEmit_rr(VT, Opcode, Op0, MaterialReg);
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return FastEmit_rr(VT, VT, Opcode, Op0, MaterialReg);
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}
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}
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unsigned FastISel::createResultReg(const TargetRegisterClass* RC) {
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unsigned FastISel::createResultReg(const TargetRegisterClass* RC) {
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@ -268,14 +268,16 @@ void FastISelEmitter::run(std::ostream &OS) {
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OS << " unsigned FastEmit_" << getLegalCName(Opcode)
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OS << " unsigned FastEmit_" << getLegalCName(Opcode)
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<< "_" << getLegalCName(getName(VT)) << "_";
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<< "_" << getLegalCName(getName(VT)) << "_";
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Operands.PrintManglingSuffix(OS);
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Operands.PrintManglingSuffix(OS);
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OS << "(";
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OS << "(MVT::SimpleValueType RetVT";
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if (!Operands.empty())
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OS << ", ";
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Operands.PrintParameters(OS);
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Operands.PrintParameters(OS);
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OS << ");\n";
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OS << ");\n";
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}
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}
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OS << " unsigned FastEmit_" << getLegalCName(Opcode) << "_";
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OS << " unsigned FastEmit_" << getLegalCName(Opcode) << "_";
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Operands.PrintManglingSuffix(OS);
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Operands.PrintManglingSuffix(OS);
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OS << "(MVT::SimpleValueType VT";
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OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT";
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if (!Operands.empty())
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if (!Operands.empty())
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OS << ", ";
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OS << ", ";
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Operands.PrintParameters(OS);
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Operands.PrintParameters(OS);
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@ -284,7 +286,7 @@ void FastISelEmitter::run(std::ostream &OS) {
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OS << " unsigned FastEmit_";
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OS << " unsigned FastEmit_";
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Operands.PrintManglingSuffix(OS);
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Operands.PrintManglingSuffix(OS);
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OS << "(MVT::SimpleValueType VT, ISD::NodeType Opcode";
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OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT, ISD::NodeType Opcode";
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if (!Operands.empty())
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if (!Operands.empty())
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OS << ", ";
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OS << ", ";
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Operands.PrintParameters(OS);
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Operands.PrintParameters(OS);
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@ -341,7 +343,9 @@ void FastISelEmitter::run(std::ostream &OS) {
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<< getLegalCName(Opcode)
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<< getLegalCName(Opcode)
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<< "_" << getLegalCName(getName(VT)) << "_";
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<< "_" << getLegalCName(getName(VT)) << "_";
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Operands.PrintManglingSuffix(OS);
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Operands.PrintManglingSuffix(OS);
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OS << "(";
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OS << "(MVT::SimpleValueType RetVT";
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if (!Operands.empty())
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OS << ", ";
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Operands.PrintParameters(OS);
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Operands.PrintParameters(OS);
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OS << ") {\n";
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OS << ") {\n";
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@ -382,7 +386,7 @@ void FastISelEmitter::run(std::ostream &OS) {
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OS << "unsigned FastISel::FastEmit_"
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OS << "unsigned FastISel::FastEmit_"
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<< getLegalCName(Opcode) << "_";
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<< getLegalCName(Opcode) << "_";
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Operands.PrintManglingSuffix(OS);
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Operands.PrintManglingSuffix(OS);
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OS << "(MVT::SimpleValueType VT";
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OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT";
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if (!Operands.empty())
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if (!Operands.empty())
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OS << ", ";
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OS << ", ";
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Operands.PrintParameters(OS);
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Operands.PrintParameters(OS);
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@ -395,7 +399,9 @@ void FastISelEmitter::run(std::ostream &OS) {
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OS << " case " << TypeName << ": return FastEmit_"
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OS << " case " << TypeName << ": return FastEmit_"
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<< getLegalCName(Opcode) << "_" << getLegalCName(TypeName) << "_";
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<< getLegalCName(Opcode) << "_" << getLegalCName(TypeName) << "_";
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Operands.PrintManglingSuffix(OS);
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Operands.PrintManglingSuffix(OS);
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OS << "(";
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OS << "(RetVT";
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if (!Operands.empty())
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OS << ", ";
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Operands.PrintArguments(OS);
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Operands.PrintArguments(OS);
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OS << ");\n";
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OS << ");\n";
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}
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}
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@ -412,7 +418,7 @@ void FastISelEmitter::run(std::ostream &OS) {
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// on opcode and type.
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// on opcode and type.
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OS << "unsigned FastISel::FastEmit_";
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OS << "unsigned FastISel::FastEmit_";
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Operands.PrintManglingSuffix(OS);
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Operands.PrintManglingSuffix(OS);
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OS << "(MVT::SimpleValueType VT, ISD::NodeType Opcode";
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OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT, ISD::NodeType Opcode";
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if (!Operands.empty())
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if (!Operands.empty())
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OS << ", ";
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OS << ", ";
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Operands.PrintParameters(OS);
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Operands.PrintParameters(OS);
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@ -425,7 +431,7 @@ void FastISelEmitter::run(std::ostream &OS) {
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OS << " case " << Opcode << ": return FastEmit_"
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OS << " case " << Opcode << ": return FastEmit_"
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<< getLegalCName(Opcode) << "_";
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<< getLegalCName(Opcode) << "_";
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Operands.PrintManglingSuffix(OS);
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Operands.PrintManglingSuffix(OS);
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OS << "(VT";
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OS << "(VT, RetVT";
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if (!Operands.empty())
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if (!Operands.empty())
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OS << ", ";
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OS << ", ";
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Operands.PrintArguments(OS);
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Operands.PrintArguments(OS);
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