Resolve a terrible hack in tblgen: instead of hardcoding

"In32BitMode" and "In64BitMode" into tblgen, allow any
predicate that inherits from AssemblerPredicate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117831 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-10-30 19:38:20 +00:00
parent 693173feef
commit 0f899c78e1
3 changed files with 26 additions and 30 deletions

View File

@ -251,6 +251,11 @@ class Instruction {
/// selector matching code. Currently each predicate is just a string.
class Predicate<string cond> {
string CondString = cond;
/// AssemblerMatcherPredicate - If this feature can be used by the assembler
/// matcher, this is true. Targets should set this by inheriting their
/// feature from the AssemblerPredicate class in addition to Predicate.
bit AssemblerMatcherPredicate = 0;
}
/// NoHonorSignDependentRounding - This predicate is true if support for
@ -529,6 +534,13 @@ class AsmParser {
}
def DefaultAsmParser : AsmParser;
/// AssemblerPredicate - This is a Predicate that can be used when the assembler
/// matches instructions and aliases.
class AssemblerPredicate {
bit AssemblerMatcherPredicate = 1;
}
/// MnemonicAlias - This class allows targets to define assembler mnemonic
/// aliases. This should be used when all forms of one mnemonic are accepted

View File

@ -414,8 +414,8 @@ def HasFMA3 : Predicate<"Subtarget->hasFMA3()">;
def HasFMA4 : Predicate<"Subtarget->hasFMA4()">;
def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;
def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">;
def In32BitMode : Predicate<"!Subtarget->is64Bit()">;
def In64BitMode : Predicate<"Subtarget->is64Bit()">;
def In32BitMode : Predicate<"!Subtarget->is64Bit()">, AssemblerPredicate;
def In64BitMode : Predicate<"Subtarget->is64Bit()">, AssemblerPredicate;
def IsWin64 : Predicate<"Subtarget->isTargetWin64()">;
def NotWin64 : Predicate<"!Subtarget->isTargetWin64()">;
def SmallCode : Predicate<"TM.getCodeModel() == CodeModel::Small">;

View File

@ -963,27 +963,15 @@ void AsmMatcherInfo::BuildInfo(CodeGenTarget &Target) {
}
// Compute the require features.
ListInit *Predicates = CGI.TheDef->getValueAsListInit("Predicates");
for (unsigned i = 0, e = Predicates->getSize(); i != e; ++i) {
if (DefInit *Pred = dynamic_cast<DefInit*>(Predicates->getElement(i))) {
// Ignore OptForSize and OptForSpeed, they aren't really requirements,
// rather they are hints to isel.
//
// FIXME: Find better way to model this.
if (Pred->getDef()->getName() == "OptForSize" ||
Pred->getDef()->getName() == "OptForSpeed")
continue;
// FIXME: Total hack; for now, we just limit ourselves to In32BitMode
// and In64BitMode, because we aren't going to have the right feature
// masks for SSE and friends. We need to decide what we are going to do
// about CPU subtypes to implement this the right way.
if (Pred->getDef()->getName() != "In32BitMode" &&
Pred->getDef()->getName() != "In64BitMode")
continue;
II->RequiredFeatures.push_back(getSubtargetFeature(Pred->getDef()));
}
std::vector<Record*> Predicates =
CGI.TheDef->getValueAsListOfDefs("Predicates");
for (unsigned i = 0, e = Predicates.size(); i != e; ++i) {
Record *Pred = Predicates[i];
// Ignore predicates that are not intended for the assembler.
if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
continue;
II->RequiredFeatures.push_back(getSubtargetFeature(Pred));
}
Instructions.push_back(II.take());
@ -1523,14 +1511,10 @@ static std::string GetAliasRequiredFeatures(Record *R) {
for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
Record *Pred = ReqFeatures[i];
// FIXME: Total hack; for now, we just limit ourselves to In32BitMode
// and In64BitMode, because we aren't going to have the right feature
// masks for SSE and friends. We need to decide what we are going to do
// about CPU subtypes to implement this the right way.
if (Pred->getName() != "In32BitMode" &&
Pred->getName() != "In64BitMode")
// Ignore predicates that are not intended for the assembler.
if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
continue;
if (NumFeatures)
Result += '|';