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https://github.com/c64scene-ar/llvm-6502.git
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Implement structured machine code printing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4435 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
3dffa7953f
commit
1049164aa6
@ -61,6 +61,19 @@ namespace {
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return false;
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}
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};
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struct Printer : public FunctionPass {
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const char *getPassName() const { return "MachineFunction Printer"; }
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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}
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bool runOnFunction(Function &F) {
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MachineFunction::get(&F).dump();
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return false;
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}
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};
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}
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Pass *createMachineCodeConstructionPass(TargetMachine &Target) {
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@ -71,11 +84,44 @@ Pass *createMachineCodeDestructionPass() {
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return new DestroyMachineFunction();
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}
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Pass *createMachineFunctionPrinterPass() {
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return new Printer();
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}
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//===---------------------------------------------------------------------===//
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// MachineFunction implementation
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//===---------------------------------------------------------------------===//
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MachineFunction::MachineFunction(const Function *F,
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const TargetMachine& target)
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: Annotation(MF_AID),
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Fn(F), Target(target), staticStackSize(0),
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automaticVarsSize(0), regSpillsSize(0),
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maxOptionalArgsSize(0), maxOptionalNumArgs(0),
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currentTmpValuesSize(0), maxTmpValuesSize(0), compiledAsLeaf(false),
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spillsAreaFrozen(false), automaticVarsAreaFrozen(false)
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{
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}
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void MachineFunction::dump() const { print(std::cerr); }
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void MachineFunction::print(std::ostream &OS) const {
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OS << "\n" << *(Value*)Fn->getReturnType() << " \"" << Fn->getName()<< "\"\n";
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for (const_iterator BB = begin(); BB != end(); ++BB) {
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BasicBlock *LBB = BB->getBasicBlock();
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OS << "\n" << LBB->getName() << " ("
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<< (const void*)BB->getBasicBlock() << "):\n";
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for (MachineBasicBlock::const_iterator I = BB->begin(); I != BB->end();++I){
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OS << "\t";
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(*I)->print(OS, Target);
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}
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}
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OS << "\nEnd function \"" << Fn->getName() << "\"\n\n";
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}
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// The next two methods are used to construct and to retrieve
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// the MachineCodeForFunction object for the given function.
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// construct() -- Allocates and initializes for a given function and target
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@ -173,17 +219,6 @@ SizeToAlignment(unsigned int size, const TargetMachine& target)
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}
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MachineFunction::MachineFunction(const Function *F,
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const TargetMachine& target)
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: Annotation(MF_AID),
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Fn(F), Target(target), staticStackSize(0),
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automaticVarsSize(0), regSpillsSize(0),
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maxOptionalArgsSize(0), maxOptionalNumArgs(0),
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currentTmpValuesSize(0), maxTmpValuesSize(0), compiledAsLeaf(false),
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spillsAreaFrozen(false), automaticVarsAreaFrozen(false)
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{
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}
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void MachineFunction::CalculateArgSize() {
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maxOptionalArgsSize = ComputeMaxOptionalArgsSize(Target, Fn,
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maxOptionalNumArgs);
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@ -292,18 +327,3 @@ MachineFunction::getOffset(const Value* val) const
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hash_map<const Value*, int>::const_iterator pair = offsets.find(val);
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return (pair == offsets.end()) ? INVALID_FRAME_OFFSET : pair->second;
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}
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void
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MachineFunction::dump() const
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{
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std::cerr << "\n" << Fn->getReturnType()
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<< " \"" << Fn->getName() << "\"\n";
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for (const_iterator BB = begin(); BB != end(); ++BB) {
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std::cerr << "\n" << BB->getBasicBlock()->getName() << " ("
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<< (const void*)BB->getBasicBlock() << ")" << ":" << "\n";
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for (MachineBasicBlock::const_iterator I = BB->begin(); I != BB->end(); ++I)
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std::cerr << "\t" << *I;
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}
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std::cerr << "\nEnd function \"" << Fn->getName() << "\"\n\n";
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}
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@ -6,6 +6,7 @@
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/Value.h"
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#include "llvm/Target/MachineInstrInfo.h" // FIXME: shouldn't need this!
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#include "llvm/Target/TargetMachine.h"
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using std::cerr;
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// Global variable holding an array of descriptors for machine instructions.
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@ -196,6 +197,96 @@ OutputReg(std::ostream &os, unsigned int regNum)
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return os << "%mreg(" << regNum << ")";
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}
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static void print(const MachineOperand &MO, std::ostream &OS,
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const TargetMachine &TM) {
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bool CloseParen = true;
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if (MO.opHiBits32())
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OS << "%lm(";
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else if (MO.opLoBits32())
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OS << "%lo(";
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else if (MO.opHiBits64())
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OS << "%hh(";
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else if (MO.opLoBits64())
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OS << "%hm(";
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else
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CloseParen = false;
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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if (MO.getVRegValue()) {
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OS << "%reg";
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OutputValue(OS, MO.getVRegValue());
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if (MO.hasAllocatedReg())
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OS << "==";
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}
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if (MO.hasAllocatedReg())
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OutputReg(OS, MO.getAllocatedRegNum());
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break;
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case MachineOperand::MO_CCRegister:
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OS << "%ccreg";
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OutputValue(OS, MO.getVRegValue());
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if (MO.hasAllocatedReg()) {
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OS << "==";
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OutputReg(OS, MO.getAllocatedRegNum());
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}
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break;
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case MachineOperand::MO_MachineRegister:
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OutputReg(OS, MO.getMachineRegNum());
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break;
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case MachineOperand::MO_SignExtendedImmed:
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OS << (long)MO.getImmedValue();
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break;
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case MachineOperand::MO_UnextendedImmed:
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OS << (long)MO.getImmedValue();
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break;
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case MachineOperand::MO_PCRelativeDisp: {
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const Value* opVal = MO.getVRegValue();
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bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
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OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
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if (opVal->hasName())
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OS << opVal->getName();
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else
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OS << (const void*) opVal;
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OS << ")";
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break;
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}
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default:
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assert(0 && "Unrecognized operand type");
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}
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if (CloseParen)
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OS << ")";
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}
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void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) {
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OS << TM.getInstrInfo().getName(getOpcode());
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
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OS << "\t";
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::print(getOperand(i), OS, TM);
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if (operandIsDefinedAndUsed(i))
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OS << "<def&use>";
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else if (operandIsDefined(i))
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OS << "<def>";
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}
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// code for printing implict references
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if (getNumImplicitRefs()) {
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OS << "\tImplicitRefs: ";
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for(unsigned i = 0, e = getNumImplicitRefs(); i != e; ++i) {
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OS << "\t";
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OutputValue(OS, getImplicitRef(i));
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if (implicitRefIsDefinedAndUsed(i))
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OS << "<def&use>";
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else if (implicitRefIsDefined(i))
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OS << "<def>";
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}
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}
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OS << "\n";
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}
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std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
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{
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os << TargetInstrDescriptors[minstr.opCode].Name;
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@ -234,28 +325,32 @@ std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
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else if (mop.opLoBits64())
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os << "%hm(";
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switch(mop.opType)
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switch (mop.getType())
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{
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case MachineOperand::MO_VirtualRegister:
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os << "%reg";
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OutputValue(os, mop.getVRegValue());
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if (mop.hasAllocatedReg())
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os << "==" << OutputReg(os, mop.getAllocatedRegNum());
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if (mop.hasAllocatedReg()) {
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os << "==";
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OutputReg(os, mop.getAllocatedRegNum());
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}
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break;
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case MachineOperand::MO_CCRegister:
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os << "%ccreg";
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OutputValue(os, mop.getVRegValue());
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if (mop.hasAllocatedReg())
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os << "==" << OutputReg(os, mop.getAllocatedRegNum());
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if (mop.hasAllocatedReg()) {
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os << "==";
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OutputReg(os, mop.getAllocatedRegNum());
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}
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break;
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case MachineOperand::MO_MachineRegister:
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OutputReg(os, mop.getMachineRegNum());
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break;
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case MachineOperand::MO_SignExtendedImmed:
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os << (long)mop.immedVal;
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os << (long)mop.getImmedValue();
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break;
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case MachineOperand::MO_UnextendedImmed:
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os << (long)mop.immedVal;
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os << (long)mop.getImmedValue();
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break;
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case MachineOperand::MO_PCRelativeDisp:
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{
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