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V8 never used the instrselectorgenerator

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15791 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-08-15 23:07:40 +00:00
parent dd43e3493a
commit 105a56ac6b
2 changed files with 2 additions and 10 deletions
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6
lib/Target/Sparc/Makefile
View File

@ -16,7 +16,7 @@ TDFILE := $(SourceDir)/SparcV8.td
# Make sure that tblgen is run, first thing.
$(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
SparcV8GenInstrInfo.inc SparcV8GenInstrSelector.inc
SparcV8GenInstrInfo.inc
SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
@echo "Building SparcV8.td register names with tblgen"
@ -38,9 +38,5 @@ SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
@echo "Building SparcV8.td instruction information with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@
SparcV8GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
@echo "Building SparcV8.td instruction selector with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-selector -o $@
clean::
$(VERB) rm -f *.inc

6
lib/Target/SparcV8/Makefile
View File

@ -16,7 +16,7 @@ TDFILE := $(SourceDir)/SparcV8.td
# Make sure that tblgen is run, first thing.
$(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
SparcV8GenInstrInfo.inc SparcV8GenInstrSelector.inc
SparcV8GenInstrInfo.inc
SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
@echo "Building SparcV8.td register names with tblgen"
@ -38,9 +38,5 @@ SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
@echo "Building SparcV8.td instruction information with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@
SparcV8GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
@echo "Building SparcV8.td instruction selector with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-selector -o $@
clean::
$(VERB) rm -f *.inc