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add an observation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40772 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1103,3 +1103,30 @@ These instructions should go away:
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movaps %xmm1, 192(%esp)
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movaps %xmm1, 192(%esp)
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movaps %xmm1, 224(%esp)
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movaps %xmm1, 224(%esp)
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movaps %xmm1, 176(%esp)
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movaps %xmm1, 176(%esp)
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//===---------------------------------------------------------------------===//
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This is a "commutable two-address" register coallescing deficiency:
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define <4 x float> @test1(<4 x float> %V) {
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entry:
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%tmp8 = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> < i32 3, i32 2, i32 1, i32 0 > ; <<4 x float>> [#uses=1]
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%add = add <4 x float> %tmp8, %V ; <<4 x float>> [#uses=1]
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ret <4 x float> %add
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}
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this codegens to:
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_test1:
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pshufd $27, %xmm0, %xmm1
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addps %xmm0, %xmm1
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movaps %xmm1, %xmm0
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ret
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instead of:
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_test1:
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pshufd $27, %xmm0, %xmm1
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addps %xmm1, %xmm0
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ret
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