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Fix PR18572 - llc crash during GenericScheduler::initPolicy().
Generalized the heuristic that looks at the (very rough) size of the register file before enabling regpressure tracking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199766 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2531,10 +2531,16 @@ void GenericScheduler::initPolicy(MachineBasicBlock::iterator Begin,
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// Avoid setting up the register pressure tracker for small regions to save
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// compile time. As a rough heuristic, only track pressure when the number of
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// schedulable instructions exceeds half the integer register file.
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unsigned NIntRegs = Context->RegClassInfo->getNumAllocatableRegs(
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TM.getTargetLowering()->getRegClassFor(MVT::i32));
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RegionPolicy.ShouldTrackPressure = NumRegionInstrs > (NIntRegs / 2);
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RegionPolicy.ShouldTrackPressure = true;
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unsigned LegalIntVT = MVT::i32;
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for (; LegalIntVT > (unsigned)MVT::i1; --LegalIntVT) {
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if (TM.getTargetLowering()->isTypeLegal((MVT::SimpleValueType)LegalIntVT)) {
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unsigned NIntRegs = Context->RegClassInfo->getNumAllocatableRegs(
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TM.getTargetLowering()->getRegClassFor(
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(MVT::SimpleValueType)LegalIntVT));
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RegionPolicy.ShouldTrackPressure = NumRegionInstrs > (NIntRegs / 2);
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}
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}
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// For generic targets, we default to bottom-up, because it's simpler and more
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// compile-time optimizations have been implemented in that direction.
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20
test/CodeGen/Mips/misched-msp430.ll
Normal file
20
test/CodeGen/Mips/misched-msp430.ll
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@ -0,0 +1,20 @@
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; RUN: llc < %s -mtriple=msp430-unknown-unknown -enable-misched | FileCheck %s
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target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
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@y = common global i16 0, align 2
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@x = common global i16 0, align 2
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; Test that the MI Scheduler's initPolicy does not crash when i32 is
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; unsupported. The content of the asm check below is unimportant. It
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; only verifies that the code generator ran succesfully.
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;
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; CHECK-LABEL: @f
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; CHECK: mov.w &y, &x
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; CHECK: ret
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define void @f() {
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entry:
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%0 = load i16* @y, align 2
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store i16 %0, i16* @x, align 2
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ret void
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}
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