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Floating point instructions like Floating point registers

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19856 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-01-27 07:58:15 +00:00
parent d2bb960d8c
commit 10b400705d
1 changed files with 1 additions and 1 deletions
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2
lib/Target/Alpha/AlphaISelPattern.cpp
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@ -333,7 +333,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N)) {
if (CN->isExactlyValue(+0.0) ||
CN->isExactlyValue(-0.0)) {
BuildMI(BB, Alpha::CPYS, 2, Result).addReg(R31).addReg(R31);
BuildMI(BB, Alpha::CPYS, 2, Result).addReg(Alpha::F31).addReg(Alpha::F31);
} else {
abort();
}