6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 04:30:23 +00:00
Code Issues Projects Releases Wiki Activity

Code clean up.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99319 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2010-03-23 20:33:48 +00:00
parent df9a4f0591
commit 112e5e7eff
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/CodeGen/MachineCSE.cpp
View File

@ -117,17 +117,15 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
MachineBasicBlock::const_iterator I,
MachineBasicBlock::const_iterator E) {
unsigned LookAheadLeft = 5;
while (LookAheadLeft--) {
while (LookAheadLeft) {
if (I == E)
// Reached end of block, register is obviously dead.
return true;
if (I->isDebugValue()) {
// These must not count against the limit.
++LookAheadLeft;
// Skip over dbg_value's.
while (I->isDebugValue())
++I;
continue;
}
bool SeenDef = false;
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = I->getOperand(i);
@ -143,6 +141,8 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
// See a def of Reg (or an alias) before encountering any use, it's
// trivially dead.
return true;
--LookAheadLeft;
++I;
}
return false;