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TargetLowering.h #includes SelectionDAGNodes.h, so it doesn't need its
own OpActionsCapacity magic number; it can just use ISD::BUILTIN_OP_END, as long as it takes care to round up when needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61733 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -56,8 +56,6 @@ struct SDVTList {
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/// ISD namespace - This namespace contains an enum which represents all of the
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/// SelectionDAG node types and value types.
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///
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/// If you add new elements here you should increase OpActionsCapacity in
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/// TargetLowering.h by the number of new elements.
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namespace ISD {
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//===--------------------------------------------------------------------===//
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@ -1489,15 +1489,12 @@ private:
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/// by the system, this holds the same type (e.g. i32 -> i32).
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MVT TransformToType[MVT::LAST_VALUETYPE];
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// Defines the capacity of the TargetLowering::OpActions table
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static const int OpActionsCapacity = 184;
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/// OpActions - For each operation and each value type, keep a LegalizeAction
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/// that indicates how instruction selection should deal with the operation.
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/// Most operations are Legal (aka, supported natively by the target), but
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/// operations that are not should be described. Note that operations on
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/// non-legal value types are not described here.
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uint64_t OpActions[OpActionsCapacity];
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uint64_t OpActions[ISD::BUILTIN_OP_END];
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/// LoadExtActions - For each load of load extension type and each value type,
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/// keep a LegalizeAction that indicates how instruction selection should deal
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@ -1535,7 +1532,7 @@ private:
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/// like PerformDAGCombine callbacks for by calling setTargetDAGCombine(),
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/// which sets a bit in this array.
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unsigned char
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TargetDAGCombineArray[OpActionsCapacity/(sizeof(unsigned char)*8)];
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TargetDAGCombineArray[(ISD::BUILTIN_OP_END+CHAR_BIT-1)/CHAR_BIT];
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/// PromoteToType - For operations that must be promoted to a specific type,
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/// this holds the destination type. This map should be sparse, so don't hold
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@ -398,8 +398,6 @@ static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
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TargetLowering::TargetLowering(TargetMachine &tm)
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: TM(tm), TD(TM.getTargetData()) {
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assert(ISD::BUILTIN_OP_END <= OpActionsCapacity &&
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"Fixed size array in TargetLowering is not large enough!");
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// All operations default to being supported.
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memset(OpActions, 0, sizeof(OpActions));
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memset(LoadExtActions, 0, sizeof(LoadExtActions));
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