Move implicit and paralle to a separate codegen specific section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83291 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-10-05 02:51:06 +00:00
parent bbc33853a5
commit 11f911f253

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@ -398,13 +398,6 @@ which case the user must specify it explicitly.</dd>
<dd>a dag value. The first element is required to be a record definition, the
remaining elements in the list may be arbitrary other values, including nested
`<tt>dag</tt>' values.</dd>
<dt><tt>(implicit a)</tt></dt>
<dd>an implicitly defined physical register. This tells the dag instruction
selection emitter the input pattern's extra definitions matches implicit
physical register definitions.</dd>
<dt><tt>(parallel (a), (b))</tt></dt>
<dd>a list of dags specifying parallel operations which map to the same
instruction.</dd>
<dt><tt>!strconcat(a, b)</tt></dt>
<dd>A string value that is the result of concatenating the 'a' and 'b'
strings.</dd>
@ -759,6 +752,25 @@ opened, as in the case with the <tt>CALL*</tt> instructions above.</p>
</div>
<!-- *********************************************************************** -->
<div class="doc_section"><a name="codegen">Code Generator backend info</a></div>
<!-- *********************************************************************** -->
<p>Expressions used by code generator to describe instructions and isel
patterns:</p>
<div class="doc_text">
<dt><tt>(implicit a)</tt></dt>
<dd>an implicitly defined physical register. This tells the dag instruction
selection emitter the input pattern's extra definitions matches implicit
physical register definitions.</dd>
<dt><tt>(parallel (a), (b))</tt></dt>
<dd>a list of dags specifying parallel operations which map to the same
instruction.</dd>
</div>
<!-- *********************************************************************** -->
<div class="doc_section"><a name="backends">TableGen backends</a></div>
<!-- *********************************************************************** -->