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Pacify gcc-4.3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53227 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -824,11 +824,12 @@ getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const
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case 'r':
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return std::make_pair(0U, Mips::CPURegsRegisterClass);
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case 'f':
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if (VT == MVT::f32)
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if (VT == MVT::f32) {
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if (Subtarget->isSingleFloat())
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return std::make_pair(0U, Mips::FGR32RegisterClass);
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else
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return std::make_pair(0U, Mips::AFGR32RegisterClass);
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}
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if (VT == MVT::f64)
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if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit()))
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return std::make_pair(0U, Mips::AFGR64RegisterClass);
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@ -859,7 +860,7 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint,
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Mips::T8, 0);
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case 'f':
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if (VT == MVT::f32)
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if (VT == MVT::f32) {
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if (Subtarget->isSingleFloat())
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return make_vector<unsigned>(Mips::F2, Mips::F3, Mips::F4, Mips::F5,
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Mips::F6, Mips::F7, Mips::F8, Mips::F9, Mips::F10, Mips::F11,
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@ -870,6 +871,7 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint,
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return make_vector<unsigned>(Mips::F2, Mips::F4, Mips::F6, Mips::F8,
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Mips::F10, Mips::F20, Mips::F22, Mips::F24, Mips::F26,
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Mips::F28, Mips::F30, 0);
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}
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if (VT == MVT::f64)
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if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit()))
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