mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-27 04:18:42 +00:00
Recognize vst1.64 / vld1.64 with 3 and 4 regs as load from / store to stack stuff
(this corresponds by spilling/reloading regs in DTriple / DQuad reg classes). No testcase, found by inspection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161300 91177308-0d34-0410-b5e6-96231b3b80d8
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b58d7d0312
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@@ -888,6 +888,8 @@ ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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}
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break;
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case ARM::VST1q64:
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case ARM::VST1d64TPseudo:
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case ARM::VST1d64QPseudo:
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if (MI->getOperand(0).isFI() &&
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MI->getOperand(2).getSubReg() == 0) {
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FrameIndex = MI->getOperand(0).getIndex();
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@@ -1056,6 +1058,8 @@ ARMBaseInstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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}
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break;
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case ARM::VLD1q64:
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case ARM::VLD1d64TPseudo:
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case ARM::VLD1d64QPseudo:
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if (MI->getOperand(1).isFI() &&
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MI->getOperand(0).getSubReg() == 0) {
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FrameIndex = MI->getOperand(1).getIndex();
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