SSARegMap -- the mapping between SSARegisters and their RegisterClasses, which

imply types of SSA Registers. This is on a per-function basis, so the
MachineFunction contains the SSARegMap, and has accessor functions to it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4774 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/MachineFunction.h

@@ -10,6 +10,7 @@
 #define LLVM_CODEGEN_MACHINEFUNCTION_H
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Annotation.h"
 #include "Support/HashExtras.h"
 #include "Support/hash_set"
@@ -46,6 +47,9 @@ class MachineFunction : private Annotation {
   bool          compiledAsLeaf;
   bool          spillsAreaFrozen;
   bool          automaticVarsAreaFrozen;
+
+  // Keeping track of mapping from SSA values to registers
+  SSARegMap *SSARegMapping;
   
 public:
   MachineFunction(const Function *Fn, const TargetMachine& target);
@@ -86,6 +90,15 @@ public:
   static void destruct(const Function *F);
   static MachineFunction& get(const Function *F);
 
+  // Getting and storing SSARegMap information
+  const TargetRegisterClass* getRegClass(unsigned Reg) { 
+    return SSARegMapping->getRegClass(Reg);
+  }
+  void addRegMap(unsigned Reg, const TargetRegisterClass *RegClass) {
+    SSARegMapping->addRegMap(Reg, RegClass);
+  }
+  void clearSSARegMap() { delete SSARegMapping; }
+
   // Provide accessors for the MachineBasicBlock list...
   typedef iplist<MachineBasicBlock> BasicBlockListType;
   typedef BasicBlockListType::iterator iterator;

include/llvm/CodeGen/SSARegMap.h

@@ -0,0 +1,40 @@
+//===-- llvm/CodeGen/SSARegMap.h --------------------------------*- C++ -*-===//
+// 
+// Map register numbers to register classes that are correctly sized (typed) to
+// hold the information. Assists register allocation. Contained by
+// MachineFunction, should be deleted by register allocator when it is no
+// longer needed.
+//   
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_SSAREGMAP_H
+#define LLVM_CODEGEN_SSAREGMAP_H
+
+#include "llvm/Target/MRegisterInfo.h"
+
+class TargetRegisterClass;
+
+class SSARegMap {
+  std::vector<const TargetRegisterClass*> RegClassMap;
+
+  unsigned rescale(unsigned Reg) { 
+    return Reg - MRegisterInfo::FirstVirtualRegister;
+  }
+
+ public:
+  SSARegMap() {}
+
+  const TargetRegisterClass* getRegClass(unsigned Reg) {
+    unsigned actualReg = rescale(Reg);
+    assert(actualReg < RegClassMap.size() && "Register out of bounds");
+    return RegClassMap[actualReg];
+  }
+
+  void addRegMap(unsigned Reg, const TargetRegisterClass* RegClass) {
+    assert(rescale(Reg) == RegClassMap.size() && 
+           "Register mapping not added in sequential order!");
+    RegClassMap.push_back(RegClass);
+  }
+};
+
+#endif