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Add basic support for code generation of
addrspace(257) -> FS relative on x86. Patch by Zoltan Varga! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70992 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1844,11 +1844,13 @@ OperandTy: VirtReg, | VirtReg, UnsImm, VirtReg, SignExtImm
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segment. LLVM address space 0 is the default address space, which includes
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the stack, and any unqualified memory accesses in a program. Address spaces
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1-255 are currently reserved for user-defined code. The GS-segment is
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represented by address space 256. Other x86 segments have yet to be
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allocated address space numbers.</p>
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represented by address space 256, while the FS-segment is represented by
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address space 257. Other x86 segments have yet to be allocated address space
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numbers.</p>
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<p>Some operating systems use the GS-segment to implement TLS, so care should be
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taken when reading and writing to address space 256 on these platforms.</p>
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<p>Some operating systems use the FS/GS-segment to implement TLS, so care
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should be taken when reading and writing to address space 256/257 on these
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platforms.</p>
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</div>
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@ -1326,6 +1326,11 @@ def MOV64GSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
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"movq\t%gs:$src, $dst",
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[(set GR64:$dst, (gsload addr:$src))]>, SegGS;
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let AddedComplexity = 5 in
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def MOV64FSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
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"movq\t%fs:$src, $dst",
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[(set GR64:$dst, (fsload addr:$src))]>, SegFS;
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//===----------------------------------------------------------------------===//
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// Atomic Instructions
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//===----------------------------------------------------------------------===//
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@ -345,6 +345,13 @@ def gsload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
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return false;
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}]>;
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def fsload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
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if (const Value *Src = cast<LoadSDNode>(N)->getSrcValue())
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if (const PointerType *PT = dyn_cast<PointerType>(Src->getType()))
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return PT->getAddressSpace() == 257;
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return false;
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}]>;
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def loadi8 : PatFrag<(ops node:$ptr), (i8 (load node:$ptr)), [{
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if (const Value *Src = cast<LoadSDNode>(N)->getSrcValue())
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if (const PointerType *PT = dyn_cast<PointerType>(Src->getType()))
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@ -3004,6 +3011,11 @@ def GS_MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
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"movl\t%gs:$src, $dst",
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[(set GR32:$dst, (gsload addr:$src))]>, SegGS;
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let AddedComplexity = 5 in
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def FS_MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
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"movl\t%fs:$src, $dst",
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[(set GR32:$dst, (fsload addr:$src))]>, SegFS;
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//===----------------------------------------------------------------------===//
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// DWARF Pseudo Instructions
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//
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8
test/CodeGen/X86/movfs.ll
Normal file
8
test/CodeGen/X86/movfs.ll
Normal file
@ -0,0 +1,8 @@
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; RUN: llvm-as < %s | llc -march=x86 | grep fs
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define i32 @foo() nounwind readonly {
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entry:
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%tmp = load i32* addrspace(257)* getelementptr (i32* addrspace(257)* inttoptr (i32 72 to i32* addrspace(257)*), i32 31) ; <i32*> [#uses=1]
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%tmp1 = load i32* %tmp ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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