Address comments on r217622

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217680 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Schmidt 2014-09-12 14:26:36 +00:00
parent 7fd9d5636a
commit 183704cb08
2 changed files with 18 additions and 4 deletions

View File

@ -278,10 +278,12 @@ bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
case 'U': // Print 'u' for update form.
case 'X': // Print 'x' for indexed form.
{
// Memory constraints should always produce an MO_Register,
// so we never get an update or indexed form. (In GCC, these
// are useful in internal code gen; not so much in inline asm.)
// So tolerate these but don't output anything.
// FIXME: Currently for PowerPC memory operands are always loaded
// into a register, so we never get an update or indexed form.
// This is bad even for offset forms, since even if we know we
// have a value in -16(r1), we will generate a load into r<n>
// and then load from 0(r<n>). Until that issue is fixed,
// tolerate 'U' and 'X' but don't output anything.
assert(MI->getOperand(OpNo).isReg());
return false;
}

View File

@ -1,5 +1,17 @@
; RUN: llc < %s -mcpu=pwr8 | FileCheck %s
; Generated from following C code:
;
; void foo (int result, char *addr) {
; __asm__ __volatile__ (
; "ld%U1%X1 %0,%1\n"
; "cmpw %0,%0\n"
; "bne- 1f\n"
; "1: isync\n"
; : "=r" (result)
; : "m"(*addr) : "memory", "cr0");
; }
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"