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CellSPU:
(a) Remove conditionally removed code in SelectXAddr. Basically, hope for the best that the A-form and D-form address predicates catch everything before the code decides to emit a X-form address. (b) Expand vector store test cases to include the usual suspects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60034 91177308-0d34-0410-b5e6-96231b3b80d8
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21bfe0b448
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@ -591,33 +591,11 @@ SPUDAGToDAGISel::SelectXFormAddr(SDValue Op, SDValue N, SDValue &Base,
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SDValue &Index) {
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if (!SelectAFormAddr(Op, N, Base, Index)
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&& !SelectDFormAddr(Op, N, Base, Index)) {
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#if 0
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// Default form of a X-form address is r(r) in operands 0 and 1:
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SDValue Op0 = N.getOperand(0);
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SDValue Op1 = N.getOperand(1);
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if ((Op0.getOpcode() == ISD::Register
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|| Op.getOpcode() == ISD::CopyFromReg)
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&& (Op1.getOpcode() == ISD::Register
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|| Op.getOpcode() == ISD::CopyFromReg)) {
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if (Op.getOpcode() == ISD::Register)
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Base = Op0;
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else
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Base = Op0.getOperand(1);
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if (Op1.getOpcode() == ISD::Register)
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Index = Op1;
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else
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Index = Op1.getOperand(1);
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return true;
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}
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#else
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// All else fails, punt and use an X-form address:
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// If the address is neither A-form or D-form, punt and use an X-form
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// address:
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Base = N.getOperand(0);
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Index = N.getOperand(1);
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return true;
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#endif
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}
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return false;
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@ -1,13 +1,75 @@
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; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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; RUN: grep {stqd.*0(\$3)} %t1.s | count 1
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; RUN: grep {stqd.*16(\$3)} %t1.s | count 1
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; RUN: grep 16256 %t1.s | count 1
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; RUN: grep 16384 %t1.s | count 1
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; RUN: grep {stqd.*0(\$3)} %t1.s | count 4
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; RUN: grep {stqd.*16(\$3)} %t1.s | count 4
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; RUN: grep 16256 %t1.s | count 2
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; RUN: grep 16384 %t1.s | count 1
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; RUN: grep {shli.*, 4} %t1.s | count 4
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; RUN: grep stqx %t1.s | count 4
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; ModuleID = 'stores.bc'
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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define void @store_v16i8_1(<16 x i8>* %a) nounwind {
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entry:
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store <16 x i8> < i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1 >, <16 x i8>* %a
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ret void
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}
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define void @store_v16i8_2(<16 x i8>* %a) nounwind {
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entry:
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%arrayidx = getelementptr <16 x i8>* %a, i32 1
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store <16 x i8> < i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2 >, <16 x i8>* %arrayidx
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ret void
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}
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define void @store_v16i8_3(<16 x i8>* %a, i32 %i) nounwind {
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entry:
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%arrayidx = getelementptr <16 x i8>* %a, i32 %i
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store <16 x i8> < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 >, <16 x i8>* %arrayidx
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ret void
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}
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define void @store_v8i16_1(<8 x i16>* %a) nounwind {
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entry:
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store <8 x i16> < i16 1, i16 2, i16 1, i16 1, i16 1, i16 2, i16 1, i16 1 >, <8 x i16>* %a
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ret void
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}
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define void @store_v8i16_2(<8 x i16>* %a) nounwind {
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entry:
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%arrayidx = getelementptr <8 x i16>* %a, i16 1
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store <8 x i16> < i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2 >, <8 x i16>* %arrayidx
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ret void
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}
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define void @store_v8i16_3(<8 x i16>* %a, i32 %i) nounwind {
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entry:
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%arrayidx = getelementptr <8 x i16>* %a, i32 %i
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store <8 x i16> < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 >, <8 x i16>* %arrayidx
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ret void
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}
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define void @store_v4i32_1(<4 x i32>* %a) nounwind {
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entry:
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store <4 x i32> < i32 1, i32 2, i32 1, i32 1 >, <4 x i32>* %a
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ret void
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}
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define void @store_v4i32_2(<4 x i32>* %a) nounwind {
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entry:
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%arrayidx = getelementptr <4 x i32>* %a, i32 1
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store <4 x i32> < i32 2, i32 2, i32 2, i32 2 >, <4 x i32>* %arrayidx
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ret void
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}
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define void @store_v4i32_3(<4 x i32>* %a, i32 %i) nounwind {
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entry:
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%arrayidx = getelementptr <4 x i32>* %a, i32 %i
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store <4 x i32> < i32 1, i32 1, i32 1, i32 1 >, <4 x i32>* %arrayidx
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ret void
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}
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define void @store_v4f32_1(<4 x float>* %a) nounwind {
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entry:
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store <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x float>* %a
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@ -20,3 +82,10 @@ entry:
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store <4 x float> < float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00 >, <4 x float>* %arrayidx
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ret void
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}
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define void @store_v4f32_3(<4 x float>* %a, i32 %i) nounwind {
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entry:
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%arrayidx = getelementptr <4 x float>* %a, i32 %i
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store <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x float>* %arrayidx
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ret void
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}
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