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Simplify interfaces used by regalloc to insert code

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5052 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2002-12-15 20:06:35 +00:00
parent c2db1a95df
commit 198ab640bb
4 changed files with 47 additions and 65 deletions
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21
include/llvm/Target/MRegisterInfo.h
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@ -13,6 +13,7 @@
#include <assert.h> #include <assert.h>
class Type; class Type;
class MachineFunction;
/// MRegisterDesc - This record contains all of the information known about a /// MRegisterDesc - This record contains all of the information known about a
/// particular register. /// particular register.
@ -112,36 +113,32 @@ public:
virtual MachineBasicBlock::iterator virtual MachineBasicBlock::iterator
storeReg2RegOffset(MachineBasicBlock *MBB, storeReg2RegOffset(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned SrcReg, unsigned DestReg, unsigned SrcReg, unsigned DestReg,
unsigned ImmOffset, unsigned dataSize) const = 0; unsigned ImmOffset, unsigned dataSize) const = 0;
virtual MachineBasicBlock::iterator virtual MachineBasicBlock::iterator
loadRegOffset2Reg(MachineBasicBlock *MBB, loadRegOffset2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
unsigned ImmOffset, unsigned dataSize) const = 0; unsigned ImmOffset, unsigned dataSize) const = 0;
virtual MachineBasicBlock::iterator virtual MachineBasicBlock::iterator
moveReg2Reg(MachineBasicBlock *MBB, moveReg2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg, unsigned dataSize) const = 0; unsigned DestReg, unsigned SrcReg, unsigned dataSize) const = 0;
virtual MachineBasicBlock::iterator virtual MachineBasicBlock::iterator
moveImm2Reg(MachineBasicBlock *MBB, moveImm2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned Imm, unsigned dataSize) const = 0; unsigned DestReg, unsigned Imm, unsigned dataSize) const = 0;
virtual MachineBasicBlock::iterator virtual void
emitPrologue(MachineBasicBlock *MBB, emitPrologue(MachineFunction &MF, unsigned numBytes) const = 0;
MachineBasicBlock::iterator MBBI,
unsigned numBytes) const = 0;
virtual MachineBasicBlock::iterator virtual void
emitEpilogue(MachineBasicBlock *MBB, emitEpilogue(MachineBasicBlock &MBB, unsigned numBytes) const = 0;
MachineBasicBlock::iterator MBBI,
unsigned numBytes) const = 0;
virtual const unsigned* getCalleeSaveRegs() const = 0; virtual const unsigned* getCalleeSaveRegs() const = 0;
virtual const unsigned* getCallerSaveRegs() const = 0; virtual const unsigned* getCallerSaveRegs() const = 0;

15
lib/CodeGen/RegAllocSimple.cpp
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@ -199,7 +199,7 @@ RegAllocSimple::moveUseToReg (MachineBasicBlock &MBB,
PhysReg = getFreeReg(VirtReg); PhysReg = getFreeReg(VirtReg);
// Add move instruction(s) // Add move instruction(s)
return RegInfo->loadRegOffset2Reg(&MBB, I, PhysReg, return RegInfo->loadRegOffset2Reg(MBB, I, PhysReg,
RegInfo->getFramePointer(), RegInfo->getFramePointer(),
-stackOffset, regClass->getDataSize()); -stackOffset, regClass->getDataSize());
} }
@ -215,7 +215,7 @@ RegAllocSimple::saveVirtRegToStack (MachineBasicBlock &MBB,
unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass); unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
// Add move instruction(s) // Add move instruction(s)
return RegInfo->storeReg2RegOffset(&MBB, I, PhysReg, return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
RegInfo->getFramePointer(), RegInfo->getFramePointer(),
-stackOffset, regClass->getDataSize()); -stackOffset, regClass->getDataSize());
} }
@ -231,7 +231,7 @@ RegAllocSimple::savePhysRegToStack (MachineBasicBlock &MBB,
unsigned offset = allocateStackSpaceFor(PhysReg, regClass); unsigned offset = allocateStackSpaceFor(PhysReg, regClass);
// Add move instruction(s) // Add move instruction(s)
return RegInfo->storeReg2RegOffset(&MBB, I, PhysReg, return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
RegInfo->getFramePointer(), RegInfo->getFramePointer(),
offset, regClass->getDataSize()); offset, regClass->getDataSize());
} }
@ -293,7 +293,7 @@ void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
// Retrieve the constant value from this op, move it to target // Retrieve the constant value from this op, move it to target
// register of the phi // register of the phi
if (opVal.isImmediate()) { if (opVal.isImmediate()) {
opI = RegInfo->moveImm2Reg(&opBlock, opI, physReg, opI = RegInfo->moveImm2Reg(opBlock, opI, physReg,
(unsigned) opVal.getImmedValue(), (unsigned) opVal.getImmedValue(),
dataSize); dataSize);
saveVirtRegToStack(opBlock, opI, virtualReg, physReg); saveVirtRegToStack(opBlock, opI, virtualReg, physReg);
@ -384,10 +384,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
AllocateBasicBlock(*MBB); AllocateBasicBlock(*MBB);
// add prologue we should preserve callee-save registers... // add prologue we should preserve callee-save registers...
MachineFunction::iterator Fi = Fn.begin(); RegInfo->emitPrologue(Fn, NumBytesAllocated);
MachineBasicBlock *MBB = Fi;
MachineBasicBlock::iterator MBBi = MBB->begin();
RegInfo->emitPrologue(MBB, MBBi, NumBytesAllocated);
const MachineInstrInfo &MII = TM.getInstrInfo(); const MachineInstrInfo &MII = TM.getInstrInfo();
@ -400,7 +397,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
MachineInstr *MI = *--I; MachineInstr *MI = *--I;
if (MII.isReturn(MI->getOpcode())) { if (MII.isReturn(MI->getOpcode())) {
// this block has a return instruction, add epilogue // this block has a return instruction, add epilogue
RegInfo->emitEpilogue(MBB, I, NumBytesAllocated); RegInfo->emitEpilogue(*MBB, NumBytesAllocated);
} }
} }

59
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -10,6 +10,7 @@
#include "llvm/Constants.h" #include "llvm/Constants.h"
#include "llvm/Type.h" #include "llvm/Type.h"
#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineFunction.h"
// X86Regs - Turn the X86RegisterInfo.def file into a bunch of register // X86Regs - Turn the X86RegisterInfo.def file into a bunch of register
// descriptors // descriptors
@ -35,7 +36,7 @@ unsigned getIdx(unsigned dataSize) {
} }
MachineBasicBlock::iterator MachineBasicBlock::iterator
X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB, X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned SrcReg, unsigned DestReg, unsigned SrcReg, unsigned DestReg,
unsigned ImmOffset, unsigned dataSize) unsigned ImmOffset, unsigned dataSize)
@ -44,11 +45,11 @@ X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB,
static const unsigned Opcode[] = { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32 }; static const unsigned Opcode[] = { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32 };
MachineInstr *MI = addRegOffset(BuildMI(Opcode[getIdx(dataSize)], 5), MachineInstr *MI = addRegOffset(BuildMI(Opcode[getIdx(dataSize)], 5),
DestReg, ImmOffset).addReg(SrcReg); DestReg, ImmOffset).addReg(SrcReg);
return ++(MBB->insert(MBBI, MI)); return ++MBB.insert(MBBI, MI);
} }
MachineBasicBlock::iterator MachineBasicBlock::iterator
X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock *MBB, X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
unsigned ImmOffset, unsigned dataSize) unsigned ImmOffset, unsigned dataSize)
@ -57,11 +58,11 @@ X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock *MBB,
static const unsigned Opcode[] = { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32 }; static const unsigned Opcode[] = { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32 };
MachineInstr *MI = addRegOffset(BuildMI(Opcode[getIdx(dataSize)], 5) MachineInstr *MI = addRegOffset(BuildMI(Opcode[getIdx(dataSize)], 5)
.addReg(DestReg), SrcReg, ImmOffset); .addReg(DestReg), SrcReg, ImmOffset);
return ++(MBB->insert(MBBI, MI)); return ++MBB.insert(MBBI, MI);
} }
MachineBasicBlock::iterator MachineBasicBlock::iterator
X86RegisterInfo::moveReg2Reg(MachineBasicBlock *MBB, X86RegisterInfo::moveReg2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
unsigned dataSize) const unsigned dataSize) const
@ -69,11 +70,11 @@ X86RegisterInfo::moveReg2Reg(MachineBasicBlock *MBB,
static const unsigned Opcode[] = { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 }; static const unsigned Opcode[] = { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 };
MachineInstr *MI = MachineInstr *MI =
BuildMI(Opcode[getIdx(dataSize)], 2).addReg(DestReg).addReg(SrcReg); BuildMI(Opcode[getIdx(dataSize)], 2).addReg(DestReg).addReg(SrcReg);
return ++(MBB->insert(MBBI, MI)); return ++MBB.insert(MBBI, MI);
} }
MachineBasicBlock::iterator MachineBasicBlock::iterator
X86RegisterInfo::moveImm2Reg(MachineBasicBlock *MBB, X86RegisterInfo::moveImm2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned Imm, unsigned dataSize) unsigned DestReg, unsigned Imm, unsigned dataSize)
const const
@ -81,7 +82,7 @@ X86RegisterInfo::moveImm2Reg(MachineBasicBlock *MBB,
static const unsigned Opcode[] = { X86::MOVir8, X86::MOVir16, X86::MOVir32 }; static const unsigned Opcode[] = { X86::MOVir8, X86::MOVir16, X86::MOVir32 };
MachineInstr *MI = MachineInstr *MI =
BuildMI(Opcode[getIdx(dataSize)], 2).addReg(DestReg).addReg(Imm); BuildMI(Opcode[getIdx(dataSize)], 2).addReg(DestReg).addReg(Imm);
return ++(MBB->insert(MBBI, MI)); return ++MBB.insert(MBBI, MI);
} }
@ -106,55 +107,47 @@ const unsigned* X86RegisterInfo::getCallerSaveRegs() const {
return CallerSaveRegs; return CallerSaveRegs;
} }
MachineBasicBlock::iterator void X86RegisterInfo::emitPrologue(MachineFunction &MF,
X86RegisterInfo::emitPrologue(MachineBasicBlock *MBB, unsigned numBytes) const {
MachineBasicBlock::iterator MBBI, MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
unsigned numBytes) const MachineBasicBlock::iterator MBBI = MBB.begin();
{
MachineInstr *MI;
// PUSH ebp // PUSH ebp
MI = BuildMI (X86::PUSHr32, 1).addReg(X86::EBP); MachineInstr *MI = BuildMI (X86::PUSHr32, 1).addReg(X86::EBP);
MBBI = ++(MBB->insert(MBBI, MI)); MBBI = ++MBB.insert(MBBI, MI);
// MOV ebp, esp // MOV ebp, esp
MI = BuildMI (X86::MOVrr32, 2).addReg(X86::EBP).addReg(X86::ESP); MI = BuildMI (X86::MOVrr32, 2).addReg(X86::EBP).addReg(X86::ESP);
MBBI = ++(MBB->insert(MBBI, MI)); MBBI = ++MBB.insert(MBBI, MI);
// adjust stack pointer // adjust stack pointer
MI = BuildMI(X86::SUBri32, 2).addReg(X86::ESP).addZImm(numBytes); MI = BuildMI(X86::SUBri32, 2).addReg(X86::ESP).addZImm(numBytes);
MBBI = ++(MBB->insert(MBBI, MI)); MBBI = ++MBB.insert(MBBI, MI);
// PUSH all callee-save registers // PUSH all callee-save registers
const unsigned* regs = getCalleeSaveRegs(); const unsigned* regs = getCalleeSaveRegs();
while (*regs) { while (*regs) {
MI = BuildMI(X86::PUSHr32, 1).addReg(*regs); MI = BuildMI(X86::PUSHr32, 1).addReg(*regs);
MBBI = ++(MBB->insert(MBBI, MI)); MBBI = ++MBB.insert(MBBI, MI);
++regs; ++regs;
} }
return MBBI;
} }
MachineBasicBlock::iterator void X86RegisterInfo::emitEpilogue(MachineBasicBlock &MBB,
X86RegisterInfo::emitEpilogue(MachineBasicBlock *MBB, unsigned numBytes) const {
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI = --MBB.end();
unsigned numBytes) const assert((*MBBI)->getOpcode() == X86::RET &&
{ "Can only insert epilog into returning blocks");
MachineInstr *MI;
// POP all callee-save registers in REVERSE ORDER // POP all callee-save registers in REVERSE ORDER
static const unsigned regs[] = { X86::EBX, X86::EDI, X86::ESI, static const unsigned regs[] = { X86::EBX, X86::EDI, X86::ESI,
MRegisterInfo::NoRegister }; MRegisterInfo::NoRegister };
unsigned idx = 0; unsigned idx = 0;
while (regs[idx]) { while (regs[idx]) {
MI = BuildMI(X86::POPr32, 1).addReg(regs[idx++]); MachineInstr *MI = BuildMI(X86::POPr32, 1).addReg(regs[idx++]);
MBBI = ++(MBB->insert(MBBI, MI)); MBBI = ++(MBB.insert(MBBI, MI));
} }
// insert LEAVE // insert LEAVE
MI = BuildMI(X86::LEAVE, 0); MBB.insert(MBBI, BuildMI(X86::LEAVE, 0));
MBBI = ++(MBB->insert(MBBI, MI));
return MBBI;
} }

17
lib/Target/X86/X86RegisterInfo.h
View File

@ -18,24 +18,24 @@ struct X86RegisterInfo : public MRegisterInfo {
MRegisterInfo::const_iterator regclass_end() const; MRegisterInfo::const_iterator regclass_end() const;
MachineBasicBlock::iterator MachineBasicBlock::iterator
storeReg2RegOffset(MachineBasicBlock *MBB, storeReg2RegOffset(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
unsigned ImmOffset, unsigned dataSize) const; unsigned ImmOffset, unsigned dataSize) const;
MachineBasicBlock::iterator MachineBasicBlock::iterator
loadRegOffset2Reg(MachineBasicBlock *MBB, loadRegOffset2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
unsigned ImmOffset, unsigned dataSize) const; unsigned ImmOffset, unsigned dataSize) const;
MachineBasicBlock::iterator MachineBasicBlock::iterator
moveReg2Reg(MachineBasicBlock *MBB, moveReg2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg, unsigned dataSize) const; unsigned DestReg, unsigned SrcReg, unsigned dataSize) const;
MachineBasicBlock::iterator MachineBasicBlock::iterator
moveImm2Reg(MachineBasicBlock *MBB, moveImm2Reg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned Imm, unsigned dataSize) const; unsigned DestReg, unsigned Imm, unsigned dataSize) const;
@ -45,13 +45,8 @@ struct X86RegisterInfo : public MRegisterInfo {
const unsigned* getCalleeSaveRegs() const; const unsigned* getCalleeSaveRegs() const;
const unsigned* getCallerSaveRegs() const; const unsigned* getCallerSaveRegs() const;
MachineBasicBlock::iterator emitPrologue(MachineBasicBlock *MBB, void emitPrologue(MachineFunction &MF, unsigned numBytes) const;
MachineBasicBlock::iterator MBBI, void emitEpilogue(MachineBasicBlock &MBB, unsigned numBytes) const;
unsigned numBytes) const;
MachineBasicBlock::iterator emitEpilogue(MachineBasicBlock *MBB,
MachineBasicBlock::iterator MBBI,
unsigned numBytes) const;
/// Returns register class appropriate for input SSA register /// Returns register class appropriate for input SSA register
/// ///