mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-21 02:24:22 +00:00
Added getNumExplicitOperands and findFirstPredOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37064 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -378,6 +378,9 @@ public:
|
|||||||
return Operands[i];
|
return Operands[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// getNumExplicitOperands - Returns the number of non-implicit operands.
|
||||||
|
///
|
||||||
|
unsigned getNumExplicitOperands() const;
|
||||||
|
|
||||||
/// isIdenticalTo - Return true if this instruction is identical to (same
|
/// isIdenticalTo - Return true if this instruction is identical to (same
|
||||||
/// opcode and same operands as) the specified instruction.
|
/// opcode and same operands as) the specified instruction.
|
||||||
@ -413,11 +416,18 @@ public:
|
|||||||
/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
|
/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
|
||||||
/// the specific register or NULL if it is not found.
|
/// the specific register or NULL if it is not found.
|
||||||
MachineOperand *findRegisterDefOperand(unsigned Reg);
|
MachineOperand *findRegisterDefOperand(unsigned Reg);
|
||||||
|
|
||||||
|
/// findFirstPredOperand() - Find the first operand in the operand list that
|
||||||
|
// is used to represent the predicate.
|
||||||
|
MachineOperand *findFirstPredOperand();
|
||||||
|
|
||||||
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
|
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
|
||||||
///
|
///
|
||||||
void copyKillDeadInfo(const MachineInstr *MI);
|
void copyKillDeadInfo(const MachineInstr *MI);
|
||||||
|
|
||||||
|
/// copyPredicates - Copies predicate operand(s) from MI.
|
||||||
|
void copyPredicates(const MachineInstr *MI);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Debugging support
|
// Debugging support
|
||||||
//
|
//
|
||||||
|
@ -141,6 +141,21 @@ bool MachineInstr::OperandsComplete() const {
|
|||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// getNumExplicitOperands - Returns the number of non-implicit operands.
|
||||||
|
///
|
||||||
|
unsigned MachineInstr::getNumExplicitOperands() const {
|
||||||
|
unsigned NumOperands = TID->numOperands;
|
||||||
|
if ((TID->Flags & M_VARIABLE_OPS) == 0)
|
||||||
|
return NumOperands;
|
||||||
|
|
||||||
|
for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
|
||||||
|
const MachineOperand &MO = getOperand(NumOperands);
|
||||||
|
if (!MO.isRegister() || !MO.isImplicit())
|
||||||
|
NumOperands++;
|
||||||
|
}
|
||||||
|
return NumOperands;
|
||||||
|
}
|
||||||
|
|
||||||
/// isIdenticalTo - Return true if this operand is identical to the specified
|
/// isIdenticalTo - Return true if this operand is identical to the specified
|
||||||
/// operand.
|
/// operand.
|
||||||
bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
|
bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
|
||||||
@ -192,6 +207,19 @@ MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
|
|||||||
}
|
}
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// findFirstPredOperand() - Find the first operand in the operand list that
|
||||||
|
// is used to represent the predicate.
|
||||||
|
MachineOperand *MachineInstr::findFirstPredOperand() {
|
||||||
|
const TargetInstrDescriptor *TID = getInstrDescriptor();
|
||||||
|
if (TID->Flags & M_PREDICATED) {
|
||||||
|
for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
|
||||||
|
if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
|
||||||
|
return &getOperand(i);
|
||||||
|
}
|
||||||
|
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
|
||||||
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
|
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
|
||||||
///
|
///
|
||||||
@ -213,6 +241,24 @@ void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// copyPredicates - Copies predicate operand(s) from MI.
|
||||||
|
void MachineInstr::copyPredicates(const MachineInstr *MI) {
|
||||||
|
const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
|
||||||
|
if (TID->Flags & M_PREDICATED) {
|
||||||
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
||||||
|
if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
|
||||||
|
const MachineOperand &MO = MI->getOperand(i);
|
||||||
|
// Predicated operands must be last operands.
|
||||||
|
if (MO.isReg())
|
||||||
|
addRegOperand(MO.getReg(), false);
|
||||||
|
else {
|
||||||
|
addImmOperand(MO.getImm());
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void MachineInstr::dump() const {
|
void MachineInstr::dump() const {
|
||||||
cerr << " " << *this;
|
cerr << " " << *this;
|
||||||
}
|
}
|
||||||
|
Reference in New Issue
Block a user