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Most of the NEON shuffle instructions do not support 64-bit element types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84785 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2361,8 +2361,11 @@ static bool isVREVMask(const SmallVectorImpl<int> &M, EVT VT,
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assert((BlockSize==16 || BlockSize==32 || BlockSize==64) &&
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"Only possible block sizes for VREV are: 16, 32, 64");
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unsigned NumElts = VT.getVectorNumElements();
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unsigned EltSz = VT.getVectorElementType().getSizeInBits();
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if (EltSz == 64)
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return false;
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unsigned NumElts = VT.getVectorNumElements();
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unsigned BlockElts = M[0] + 1;
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if (BlockSize <= EltSz || BlockSize != BlockElts * EltSz)
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@ -2379,6 +2382,10 @@ static bool isVREVMask(const SmallVectorImpl<int> &M, EVT VT,
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static bool isVTRNMask(const SmallVectorImpl<int> &M, EVT VT,
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unsigned &WhichResult) {
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unsigned EltSz = VT.getVectorElementType().getSizeInBits();
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if (EltSz == 64)
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return false;
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unsigned NumElts = VT.getVectorNumElements();
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WhichResult = (M[0] == 0 ? 0 : 1);
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for (unsigned i = 0; i < NumElts; i += 2) {
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@ -2391,6 +2398,10 @@ static bool isVTRNMask(const SmallVectorImpl<int> &M, EVT VT,
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static bool isVUZPMask(const SmallVectorImpl<int> &M, EVT VT,
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unsigned &WhichResult) {
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unsigned EltSz = VT.getVectorElementType().getSizeInBits();
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if (EltSz == 64)
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return false;
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unsigned NumElts = VT.getVectorNumElements();
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WhichResult = (M[0] == 0 ? 0 : 1);
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for (unsigned i = 0; i != NumElts; ++i) {
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@ -2399,7 +2410,7 @@ static bool isVUZPMask(const SmallVectorImpl<int> &M, EVT VT,
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}
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// VUZP.32 for 64-bit vectors is a pseudo-instruction alias for VTRN.32.
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if (VT.is64BitVector() && VT.getVectorElementType().getSizeInBits() == 32)
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if (VT.is64BitVector() && EltSz == 32)
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return false;
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return true;
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@ -2407,6 +2418,10 @@ static bool isVUZPMask(const SmallVectorImpl<int> &M, EVT VT,
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static bool isVZIPMask(const SmallVectorImpl<int> &M, EVT VT,
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unsigned &WhichResult) {
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unsigned EltSz = VT.getVectorElementType().getSizeInBits();
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if (EltSz == 64)
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return false;
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unsigned NumElts = VT.getVectorNumElements();
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WhichResult = (M[0] == 0 ? 0 : 1);
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unsigned Idx = WhichResult * NumElts / 2;
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@ -2418,7 +2433,7 @@ static bool isVZIPMask(const SmallVectorImpl<int> &M, EVT VT,
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}
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// VZIP.32 for 64-bit vectors is a pseudo-instruction alias for VTRN.32.
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if (VT.is64BitVector() && VT.getVectorElementType().getSizeInBits() == 32)
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if (VT.is64BitVector() && EltSz == 32)
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return false;
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return true;
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