6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-01 03:33:42 +00:00
Code Issues Projects Releases Wiki Activity

[Hexagon] Ading i64 <- i32, i32 sextw pattern.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224027 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Colin LeMahieu 2014-12-11 17:08:21 +00:00
parent 015408c6b1
commit 21876d5dd5
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/Hexagon/HexagonInstrInfo.td
View File

@ -2226,6 +2226,8 @@ class T_S2op_1_di <string mnemonic, bits<2> MajOp, bits<3> MinOp>
let isCodeGenOnly = 0 in
def A2_sxtw : T_S2op_1_di <"sxtw", 0b01, 0b000>;
def: Pat <(i64 (sext I32:$src)), (A2_sxtw I32:$src)>;
//===----------------------------------------------------------------------===//
// STYPE/ALU -
//===----------------------------------------------------------------------===//